Lines Matching refs:qmp

22 #include "phy-qcom-qmp.h"
209 * @qmp: QMP phy to which this lane belongs
221 struct qcom_qmp *qmp;
338 struct qcom_qmp *qmp = qphy->qmp;
357 dev_err(qmp->dev,
367 struct qcom_qmp *qmp = qphy->qmp;
372 mutex_lock(&qmp->phy_mutex);
373 if (qmp->init_count++) {
374 mutex_unlock(&qmp->phy_mutex);
378 ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs);
380 dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret);
384 ret = reset_control_bulk_assert(cfg->num_resets, qmp->resets);
386 dev_err(qmp->dev, "reset assert failed\n");
390 ret = reset_control_bulk_deassert(cfg->num_resets, qmp->resets);
392 dev_err(qmp->dev, "reset deassert failed\n");
396 ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
403 mutex_unlock(&qmp->phy_mutex);
408 reset_control_bulk_assert(cfg->num_resets, qmp->resets);
410 regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
412 qmp->init_count--;
413 mutex_unlock(&qmp->phy_mutex);
420 struct qcom_qmp *qmp = qphy->qmp;
424 mutex_lock(&qmp->phy_mutex);
425 if (--qmp->init_count) {
426 mutex_unlock(&qmp->phy_mutex);
437 reset_control_bulk_assert(cfg->num_resets, qmp->resets);
439 clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
441 regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
443 mutex_unlock(&qmp->phy_mutex);
451 struct qcom_qmp *qmp = qphy->qmp;
453 dev_vdbg(qmp->dev, "Initializing QMP phy\n");
465 struct qcom_qmp *qmp = qphy->qmp;
478 dev_err(qmp->dev, "lane%d reset deassert failed\n",
485 dev_err(qmp->dev, "pipe_clk enable failed err=%d\n", ret);
514 dev_err(qmp->dev, "phy initialization timed-out\n");
587 struct qcom_qmp *qmp = dev_get_drvdata(dev);
591 qmp->vregs = devm_kcalloc(dev, num, sizeof(*qmp->vregs), GFP_KERNEL);
592 if (!qmp->vregs)
596 qmp->vregs[i].supply = cfg->vreg_list[i];
598 return devm_regulator_bulk_get(dev, num, qmp->vregs);
603 struct qcom_qmp *qmp = dev_get_drvdata(dev);
607 qmp->resets = devm_kcalloc(dev, cfg->num_resets,
608 sizeof(*qmp->resets), GFP_KERNEL);
609 if (!qmp->resets)
613 qmp->resets[i].id = cfg->reset_list[i];
615 ret = devm_reset_control_bulk_get_exclusive(dev, cfg->num_resets, qmp->resets);
624 struct qcom_qmp *qmp = dev_get_drvdata(dev);
628 qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL);
629 if (!qmp->clks)
633 qmp->clks[i].id = cfg->clk_list[i];
635 return devm_clk_bulk_get(dev, num, qmp->clks);
661 static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np)
669 dev_err(qmp->dev, "%pOFn: No clock-output-names\n", np);
673 fixed = devm_kzalloc(qmp->dev, sizeof(*fixed), GFP_KERNEL);
683 ret = devm_clk_hw_register(qmp->dev, &fixed->hw);
695 return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np);
712 struct qcom_qmp *qmp = dev_get_drvdata(dev);
764 qphy->qmp = qmp;
765 qmp->phys[id] = qphy;
773 .compatible = "qcom,msm8996-qmp-pcie-phy",
782 struct qcom_qmp *qmp;
791 qmp = devm_kzalloc(dev, sizeof(*qmp), GFP_KERNEL);
792 if (!qmp)
795 qmp->dev = dev;
796 dev_set_drvdata(dev, qmp);
808 mutex_init(&qmp->phy_mutex);
827 qmp->phys = devm_kcalloc(dev, num, sizeof(*qmp->phys), GFP_KERNEL);
828 if (!qmp->phys)
845 ret = phy_pipe_clk_register(qmp, child);
847 dev_err(qmp->dev,
867 .name = "qcom-qmp-msm8996-pcie-phy",