Lines Matching refs:cmu_sel
106 enum sparx5_10g28cmu_mode cmu_sel; /* Device/Mode serdes uses */
236 enum sparx5_10g28cmu_mode cmu_sel; /* Device/Mode serdes uses */
257 u8 cmu_sel;
562 .cmu_sel = SPX5_SD10G28_CMU_MAIN,
571 .cmu_sel = SPX5_SD10G28_CMU_MAIN,
580 .cmu_sel = SPX5_SD10G28_CMU_MAIN,
589 .cmu_sel = SPX5_SD10G28_CMU_AUX1,
598 .cmu_sel = SPX5_SD10G28_CMU_AUX2,
607 .cmu_sel = SPX5_SD10G28_CMU_AUX1,
834 .cmu_sel = mode->cmu_sel,
835 .cfg_lane_reserve_7_0 = (mode->cmu_sel % 2) << 6,
836 .cfg_ssc_rtl_clk_sel = (mode->cmu_sel / 2),
1653 cmu_idx = sparx5_serdes_cmu_get(params->cmu_sel, lane_index);
1706 sdx5_rmw(SD_LANE_SD_LANE_CFG_RX_REF_SEL_SET(params->cmu_sel) |
1707 SD_LANE_SD_LANE_CFG_TX_REF_SEL_SET(params->cmu_sel),