Lines Matching refs:cmu_idx
931 u32 cmu_idx,
940 cmu_tgt = sdx5_inst_get(priv, TARGET_SD_CMU, cmu_idx);
941 cmu_cfg_tgt = sdx5_inst_get(priv, TARGET_SD_CMU_CFG, cmu_idx);
943 if (cmu_idx == 1 || cmu_idx == 4 || cmu_idx == 7 ||
944 cmu_idx == 10 || cmu_idx == 13) {
951 SD_CMU_CFG_SD_CMU_CFG(cmu_idx));
956 SD_CMU_CFG_SD_CMU_CFG(cmu_idx));
961 SD_CMU_CFG_SD_CMU_CFG(cmu_idx));
974 SD_CMU_CMU_45(cmu_idx));
979 SD_CMU_CMU_47(cmu_idx));
984 SD_CMU_CMU_1B(cmu_idx));
989 SD_CMU_CMU_0D(cmu_idx));
994 SD_CMU_CMU_1F(cmu_idx));
999 SD_CMU_CMU_00(cmu_idx));
1004 SD_CMU_CMU_05(cmu_idx));
1009 SD_CMU_CMU_30(cmu_idx));
1014 SD_CMU_CMU_09(cmu_idx));
1019 SD_CMU_CFG_SD_CMU_CFG(cmu_idx));
1026 SD_CMU_CMU_44(cmu_idx));
1031 SD_CMU_CMU_44(cmu_idx));
1035 value = readl(sdx5_addr(regs, SD_CMU_CMU_E0(cmu_idx)));
1045 SD_CMU_CMU_0D(cmu_idx));
1049 static int sparx5_cmu_cfg(struct sparx5_serdes_private *priv, u32 cmu_idx)
1054 if (cmu_idx == 1 || cmu_idx == 4 || cmu_idx == 7 ||
1055 cmu_idx == 10 || cmu_idx == 13) {
1059 cmu_tgt = sdx5_inst_get(priv, TARGET_SD_CMU, cmu_idx);
1060 cmu_cfg_tgt = sdx5_inst_get(priv, TARGET_SD_CMU_CFG, cmu_idx);
1062 return sparx5_cmu_apply_cfg(priv, cmu_idx, cmu_tgt, cmu_cfg_tgt, spd10g);
1646 u32 value, cmu_idx;
1653 cmu_idx = sparx5_serdes_cmu_get(params->cmu_sel, lane_index);
1654 err = sparx5_cmu_cfg(priv, cmu_idx);