Lines Matching defs:xsphy
3 * MediaTek USB3.1 gen2 xsphy Driver
109 static void u2_phy_slew_rate_calibrate(struct mtk_xsphy *xsphy,
149 tmp = xsphy->src_ref_clk * xsphy->src_coef;
156 dev_dbg(xsphy->dev, "phy.%d, fm_out:%d, calib:%d (clk:%d, coef:%d)\n",
158 xsphy->src_ref_clk, xsphy->src_coef);
167 static void u2_phy_instance_init(struct mtk_xsphy *xsphy,
178 static void u2_phy_instance_power_on(struct mtk_xsphy *xsphy,
190 dev_dbg(xsphy->dev, "%s(%d)\n", __func__, index);
193 static void u2_phy_instance_power_off(struct mtk_xsphy *xsphy,
205 dev_dbg(xsphy->dev, "%s(%d)\n", __func__, index);
208 static void u2_phy_instance_set_mode(struct mtk_xsphy *xsphy,
232 static void phy_parse_property(struct mtk_xsphy *xsphy,
263 dev_err(xsphy->dev, "incompatible phy type\n");
268 static void u2_phy_props_set(struct mtk_xsphy *xsphy,
290 static void u3_phy_props_set(struct mtk_xsphy *xsphy,
296 mtk_phy_update_field(xsphy->glb_base + SSPXTP_PHYA_GLB_00,
311 struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent);
316 dev_err(xsphy->dev, "failed to enable ref_clk\n");
322 u2_phy_instance_init(xsphy, inst);
323 u2_phy_props_set(xsphy, inst);
326 u3_phy_props_set(xsphy, inst);
329 dev_err(xsphy->dev, "incompatible phy type\n");
340 struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent);
343 u2_phy_instance_power_on(xsphy, inst);
344 u2_phy_slew_rate_calibrate(xsphy, inst);
353 struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent);
356 u2_phy_instance_power_off(xsphy, inst);
372 struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent);
375 u2_phy_instance_set_mode(xsphy, inst, mode);
383 struct mtk_xsphy *xsphy = dev_get_drvdata(dev);
393 for (index = 0; index < xsphy->nphys; index++)
394 if (phy_np == xsphy->phys[index]->phy->dev.of_node) {
395 inst = xsphy->phys[index];
411 phy_parse_property(xsphy, inst);
426 { .compatible = "mediatek,xsphy", },
438 struct mtk_xsphy *xsphy;
442 xsphy = devm_kzalloc(dev, sizeof(*xsphy), GFP_KERNEL);
443 if (!xsphy)
446 xsphy->nphys = of_get_child_count(np);
447 xsphy->phys = devm_kcalloc(dev, xsphy->nphys,
448 sizeof(*xsphy->phys), GFP_KERNEL);
449 if (!xsphy->phys)
452 xsphy->dev = dev;
453 platform_set_drvdata(pdev, xsphy);
459 xsphy->glb_base = devm_ioremap_resource(dev, glb_res);
460 if (IS_ERR(xsphy->glb_base)) {
462 return PTR_ERR(xsphy->glb_base);
466 xsphy->src_ref_clk = XSP_REF_CLK;
467 xsphy->src_coef = XSP_SLEW_RATE_COEF;
470 &xsphy->src_ref_clk);
471 device_property_read_u32(dev, "mediatek,src-coef", &xsphy->src_coef);
484 xsphy->phys[port] = inst;
531 .name = "mtk-xsphy",