Lines Matching defs:phya
303 void __iomem *phya; /* include u3phya_da */
540 tmp = readl(u3_banks->phya + U3P_U3_PHYA_REG0);
599 mtk_phy_update_field(u3_banks->phya + U3P_U3_PHYA_REG0,
768 void __iomem *phya = u3_banks->phya;
776 mtk_phy_update_field(phya + U3P_U3_PHYA_DA_REG0, P3A_RG_XTAL_EXT_EN_U3, 2);
778 mtk_phy_update_field(phya + U3P_U3_PHYA_REG9, P3A_RG_RX_DAC_MUX, 4);
780 mtk_phy_update_field(phya + U3P_U3_PHYA_REG6, P3A_RG_TX_EIDLE_CM, 0xe);
949 void __iomem *phya = u3_banks->phya;
954 mtk_phy_update_bits(phya + U3P_U3_PHYA_DA_REG0,
960 mtk_phy_update_field(phya + U3P_U3_PHYA_REG1, P3A_RG_CLKDRV_AMP, 0x4);
962 mtk_phy_update_field(phya + U3P_U3_PHYA_REG0, P3A_RG_CLKDRV_OFF, 0x1);
965 mtk_phy_update_field(phya + U3P_U3_PHYA_DA_REG20, P3A_RG_PLL_DELTA1_PE2H, 0x3c);
967 mtk_phy_update_field(phya + U3P_U3_PHYA_DA_REG25, P3A_RG_PLL_DELTA_PE2H, 0x36);
970 mtk_phy_update_bits(phya + U3P_U3_PHYA_DA_REG5,
975 mtk_phy_update_bits(phya + U3P_U3_PHYA_DA_REG4,
979 mtk_phy_update_field(phya + U3P_U3_PHYA_DA_REG6, P3A_RG_PLL_IR_PE2H, 0x2);
981 mtk_phy_update_field(phya + U3P_U3_PHYA_DA_REG7, P3A_RG_PLL_BP_PE2H, 0xa);
1082 u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
1110 u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V2_U3PHYA;
1346 mtk_phy_update_field(u3_banks->phya + U3P_U3_PHYA_REG0, P3A_RG_IEXT_INTR,