Lines Matching defs:HDMI_CON0
10 #define HDMI_CON0 0x00
93 mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_PLL_POSDIV);
97 mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_PLL_EN);
113 mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_PLL_EN);
116 mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_PLL_POSDIV);
160 mtk_phy_update_field(base + HDMI_CON0, RG_HDMITX_PLL_PREDIV, pre_div);
161 mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_PLL_POSDIV);
162 mtk_phy_update_bits(base + HDMI_CON0,
167 mtk_phy_update_bits(base + HDMI_CON0,
172 mtk_phy_update_bits(base + HDMI_CON0,