Lines Matching defs:PORT_REGS
79 #define PORT_REGS(p) ((p)->priv->regs + (p)->id * 0x1000)
121 reg = readl(PORT_REGS(port) + UTMI_PLL_CTRL_REG);
125 writel(reg, PORT_REGS(port) + UTMI_PLL_CTRL_REG);
128 reg = readl(PORT_REGS(port) + UTMI_CAL_CTRL_REG);
131 writel(reg, PORT_REGS(port) + UTMI_CAL_CTRL_REG);
134 reg = readl(PORT_REGS(port) + UTMI_TX_CH_CTRL_REG);
137 writel(reg, PORT_REGS(port) + UTMI_TX_CH_CTRL_REG);
140 reg = readl(PORT_REGS(port) + UTMI_RX_CH_CTRL0_REG);
143 writel(reg, PORT_REGS(port) + UTMI_RX_CH_CTRL0_REG);
149 reg = readl(PORT_REGS(port) + UTMI_RX_CH_CTRL1_REG);
152 writel(reg, PORT_REGS(port) + UTMI_RX_CH_CTRL1_REG);
158 reg = readl(PORT_REGS(port) + UTMI_CHGDTC_CTRL_REG);
161 writel(reg, PORT_REGS(port) + UTMI_CHGDTC_CTRL_REG);
218 reg = readl(PORT_REGS(port) + UTMI_CTRL_STATUS0_REG);
220 writel(reg, PORT_REGS(port) + UTMI_CTRL_STATUS0_REG);
233 reg = readl(PORT_REGS(port) + UTMI_CTRL_STATUS0_REG);
235 writel(reg, PORT_REGS(port) + UTMI_CTRL_STATUS0_REG);
238 ret = readl_poll_timeout(PORT_REGS(port) + UTMI_CAL_CTRL_REG, reg,
247 ret = readl_poll_timeout(PORT_REGS(port) + UTMI_CAL_CTRL_REG, reg,
256 ret = readl_poll_timeout(PORT_REGS(port) + UTMI_PLL_CTRL_REG, reg,