Lines Matching refs:ret

143 	int ret;
146 ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
148 if (ret)
149 return ret;
164 int ret, reg;
171 ret = regmap_update_bits(usb31misc, USB_MISC_CFG54, reg, reg);
173 if (ret)
174 return ret;
176 ret = hi3670_phy_cr_clk(usb31misc);
177 if (ret)
178 return ret;
188 int ret;
191 ret = regmap_read(usb31misc, USB_MISC_CFG54, &reg);
192 if (ret)
193 return ret;
197 ret = hi3670_phy_cr_clk(usb31misc);
198 if (ret)
199 return ret;
210 int ret;
212 ret = regmap_read(usb31misc, USB_MISC_CFG54, &reg);
213 if (ret)
214 return ret;
224 int reg, i, ret;
227 ret = hi3670_phy_cr_clk(usb31misc);
228 if (ret)
229 return ret;
232 ret = hi3670_phy_cr_set_sel(usb31misc);
233 if (ret)
234 return ret;
236 ret = hi3670_phy_cr_set_addr(usb31misc, addr);
237 if (ret)
238 return ret;
240 ret = hi3670_phy_cr_start(usb31misc, 0);
241 if (ret)
242 return ret;
244 ret = hi3670_phy_cr_wait_ack(usb31misc);
245 if (ret)
246 return ret;
248 ret = regmap_read(usb31misc, USB_MISC_CFG58, &reg);
249 if (ret)
250 return ret;
260 int ret;
263 ret = hi3670_phy_cr_clk(usb31misc);
264 if (ret)
265 return ret;
268 ret = hi3670_phy_cr_set_sel(usb31misc);
269 if (ret)
270 return ret;
272 ret = hi3670_phy_cr_set_addr(usb31misc, addr);
273 if (ret)
274 return ret;
276 ret = regmap_write(usb31misc, USB_MISC_CFG58,
278 if (ret)
279 return ret;
281 ret = hi3670_phy_cr_start(usb31misc, 1);
282 if (ret)
283 return ret;
291 int ret;
294 ret = regmap_write(priv->usb31misc, USB3OTG_CTRL4,
296 if (ret) {
298 return ret;
302 ret = hi3670_phy_cr_read(priv->usb31misc,
304 if (!ret)
307 if (ret != -ETIMEDOUT) {
309 return ret;
312 if (ret)
313 return ret;
316 ret = hi3670_phy_cr_write(priv->usb31misc, TX_VBOOST_LVL_REG, reg);
317 if (ret)
320 return ret;
346 int ret;
350 ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS,
352 if (ret)
356 ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
362 ret = regmap_update_bits(priv->pctrl,
364 if (ret)
367 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
369 if (ret)
372 ret = regmap_read(priv->usb31misc, USB3OTG_CTRL7, &val);
373 if (ret)
377 ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
378 if (ret)
384 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
387 if (ret)
390 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
393 if (ret)
396 ret = regmap_read(priv->usb31misc, USB3OTG_CTRL7, &val);
397 if (ret)
401 ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
402 if (ret)
405 ret = regmap_write(priv->peri_crg,
407 if (ret)
412 dev_err(priv->dev, "failed to config phy clock ret: %d\n", ret);
413 return ret;
419 int ret;
421 ret = regmap_write(priv->usb31misc, TCA_INTR_STS, 0xffff);
422 if (ret)
425 ret = regmap_write(priv->usb31misc, TCA_INTR_EN,
427 if (ret)
431 ret = regmap_update_bits(priv->usb31misc, TCA_CLK_RST, mask, 0);
432 if (ret)
435 ret = regmap_update_bits(priv->usb31misc, TCA_GCFG,
438 if (ret)
441 ret = regmap_update_bits(priv->usb31misc, TCA_SYSMODE_CFG,
443 if (ret)
446 ret = regmap_read(priv->usb31misc, TCA_TCPC, &val);
447 if (ret)
451 ret = regmap_write(priv->usb31misc, TCA_TCPC, val);
452 if (ret)
455 ret = regmap_write(priv->usb31misc, TCA_VBUS_CTRL,
457 if (ret)
462 dev_err(priv->dev, "failed to config phy clock ret: %d\n", ret);
463 return ret;
470 int ret;
475 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, 0);
476 if (ret)
479 ret = hi3670_config_phy_clock(priv);
480 if (ret)
484 ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL5,
486 if (ret)
490 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG50,
492 if (ret)
497 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
498 if (ret)
506 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
508 if (ret)
511 ret = hi3670_config_tca(priv);
512 if (ret)
516 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG5C,
519 if (ret)
524 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
525 if (ret)
532 ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL0, val, val);
533 if (ret)
537 ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL3, val, val);
538 if (ret)
543 ret = hi3670_phy_set_params(priv);
544 if (ret)
549 dev_err(priv->dev, "failed to init phy ret: %d\n", ret);
550 return ret;
557 int ret;
561 ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, mask, 0);
562 if (ret)
567 ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
570 ret = regmap_write(priv->peri_crg, PERI_CRG_PERDIS6,
572 if (ret)
578 dev_err(priv->dev, "failed to exit phy ret: %d\n", ret);
579 return ret;