Lines Matching refs:core
42 * @core: pointer to the Stingray PCIe PHY core control
47 struct sr_pcie_phy_core *core;
53 * struct sr_pcie_phy_core - Stingray PCIe PHY core control
76 * core and associated serdes has been enabled as RC and is available for use
81 /* PIPEMUX = 1, EP 1x8 + RC 1x8, core 7 */
120 static u32 pipemux_strap_read(struct sr_pcie_phy_core *core)
130 pipemux = readl(core->base + PCIE_PIPEMUX_CFG_OFFSET);
133 regmap_read(core->cdru, CDRU_STRAP_DATA_LSW_OFFSET, &pipemux);
142 * Given a PIPEMUX strap and PCIe core index, this function returns true if the
143 * PCIe core needs to be enabled
147 struct sr_pcie_phy_core *core = phy->core;
150 return !!((pipemux_table[core->pipemux] >> core_idx) & 0x1);
171 struct sr_pcie_phy_core *core = phy->core;
178 regmap_read(core->mhb, MHB_MEM_PW_PAXC_OFFSET, &val);
180 dev_err(core->dev, "PAXC is not powered up\n");
200 struct sr_pcie_phy_core *core;
203 core = dev_get_drvdata(dev);
204 if (!core)
212 return core->phys[phy_idx].phy;
219 struct sr_pcie_phy_core *core;
223 core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL);
224 if (!core)
227 core->dev = dev;
228 core->base = devm_platform_ioremap_resource(pdev, 0);
229 if (IS_ERR(core->base))
230 return PTR_ERR(core->base);
232 core->cdru = syscon_regmap_lookup_by_phandle(node, "brcm,sr-cdru");
233 if (IS_ERR(core->cdru)) {
234 dev_err(core->dev, "unable to find CDRU device\n");
235 return PTR_ERR(core->cdru);
238 core->mhb = syscon_regmap_lookup_by_phandle(node, "brcm,sr-mhb");
239 if (IS_ERR(core->mhb)) {
240 dev_err(core->dev, "unable to find MHB device\n");
241 return PTR_ERR(core->mhb);
245 core->pipemux = pipemux_strap_read(core);
246 if (!pipemux_strap_is_valid(core->pipemux)) {
247 dev_err(core->dev, "invalid PCIe PIPEMUX strap %u\n",
248 core->pipemux);
253 struct sr_pcie_phy *p = &core->phys[phy_idx];
267 p->core = core;
272 dev_set_drvdata(dev, core);