Lines Matching refs:val
107 void (*write_counter)(struct xgene_pmu_dev *pmu, int idx, u64 val);
108 void (*write_evttype)(struct xgene_pmu_dev *pmu_dev, int idx, u32 val);
109 void (*write_agentmsk)(struct xgene_pmu_dev *pmu_dev, u32 val);
110 void (*write_agent1msk)(struct xgene_pmu_dev *pmu_dev, u32 val);
757 xgene_pmu_write_counter32(struct xgene_pmu_dev *pmu_dev, int idx, u64 val)
759 writel(val, pmu_dev->inf->csr + PMU_PMEVCNTR0 + (4 * idx));
763 xgene_pmu_write_counter64(struct xgene_pmu_dev *pmu_dev, int idx, u64 val)
767 cnt_hi = upper_32_bits(val);
768 cnt_lo = lower_32_bits(val);
776 xgene_pmu_write_evttype(struct xgene_pmu_dev *pmu_dev, int idx, u32 val)
778 writel(val, pmu_dev->inf->csr + PMU_PMEVTYPER0 + (4 * idx));
782 xgene_pmu_write_agentmsk(struct xgene_pmu_dev *pmu_dev, u32 val)
784 writel(val, pmu_dev->inf->csr + PMU_PMAMR0);
788 xgene_pmu_v3_write_agentmsk(struct xgene_pmu_dev *pmu_dev, u32 val) { }
791 xgene_pmu_write_agent1msk(struct xgene_pmu_dev *pmu_dev, u32 val)
793 writel(val, pmu_dev->inf->csr + PMU_PMAMR1);
797 xgene_pmu_v3_write_agent1msk(struct xgene_pmu_dev *pmu_dev, u32 val) { }
802 u32 val;
804 val = readl(pmu_dev->inf->csr + PMU_PMCNTENSET);
805 val |= 1 << idx;
806 writel(val, pmu_dev->inf->csr + PMU_PMCNTENSET);
812 u32 val;
814 val = readl(pmu_dev->inf->csr + PMU_PMCNTENCLR);
815 val |= 1 << idx;
816 writel(val, pmu_dev->inf->csr + PMU_PMCNTENCLR);
822 u32 val;
824 val = readl(pmu_dev->inf->csr + PMU_PMINTENSET);
825 val |= 1 << idx;
826 writel(val, pmu_dev->inf->csr + PMU_PMINTENSET);
832 u32 val;
834 val = readl(pmu_dev->inf->csr + PMU_PMINTENCLR);
835 val |= 1 << idx;
836 writel(val, pmu_dev->inf->csr + PMU_PMINTENCLR);
841 u32 val;
843 val = readl(pmu_dev->inf->csr + PMU_PMCR);
844 val |= PMU_PMCR_P;
845 writel(val, pmu_dev->inf->csr + PMU_PMCR);
850 u32 val;
852 val = readl(pmu_dev->inf->csr + PMU_PMCR);
853 val |= PMU_PMCR_E;
854 writel(val, pmu_dev->inf->csr + PMU_PMCR);
859 u32 val;
861 val = readl(pmu_dev->inf->csr + PMU_PMCR);
862 val &= ~PMU_PMCR_E;
863 writel(val, pmu_dev->inf->csr + PMU_PMCR);
981 u64 val = 1ULL << 31;
983 local64_set(&hw->prev_count, val);
984 xgene_pmu->ops->write_counter(pmu_dev, hw->idx, val);
1234 u32 val;
1239 val = readl(xgene_pmu->pcppmu_csr + PCPPMU_INTSTATUS_REG);
1251 if (val & intr_mcu) {
1256 if (val & intr_mcb) {
1261 if (val & intr_l3c) {
1266 if (val & intr_iob) {