Lines Matching refs:event
77 * Each hardware event contains two registers (counter and ext_counter) for
79 * be triggered to run at the same when a hardware event is enabled. The meaning
80 * of counter and ext_counter of different event type are different, their
84 * | event type | counter | ext_counter |
98 * Performance of each hardware event is calculated by: counter / ext_counter.
101 * ext_counter as a separate event for userspace and use bit 16 to indicate it.
102 * For example, event 0x00001 and 0x10001 are actually one event for hardware
103 * because bit 0-15 are same. If the bit 16 of one event is 0 means to read
224 /* filter mode supported by each bandwidth event */
241 /* filter mode supported by each packet rate event */
262 /* filter mode supported by each latency event */
284 /* filter mode supported by each interrupt rate event */
297 u32 event;
325 static inline u64 hns3_pmu_get_##_name(struct perf_event *event) \
328 event->attr._config); \
379 struct hns3_pmu_event_attr *event;
383 event = eattr->var;
385 return sysfs_emit(buf, "config=0x%x\n", event->event);
392 struct hns3_pmu_event_attr *event;
397 event = eattr->var;
400 if (event->filter_support & HNS3_PMU_FILTER_SUPPORT_GLOBAL)
402 if (event->filter_support & HNS3_PMU_FILTER_SUPPORT_PORT)
404 if (event->filter_support & HNS3_PMU_FILTER_SUPPORT_PORT_TC)
406 if (event->filter_support & HNS3_PMU_FILTER_SUPPORT_FUNC)
408 if (event->filter_support & HNS3_PMU_FILTER_SUPPORT_FUNC_QUEUE)
410 if (event->filter_support & HNS3_PMU_FILTER_SUPPORT_FUNC_INTR)
727 static u32 hns3_pmu_get_event(struct perf_event *event)
729 return hns3_pmu_get_ext_counter_used(event) << 16 |
730 hns3_pmu_get_event_type(event) << 8 |
731 hns3_pmu_get_subevent(event);
734 static u32 hns3_pmu_get_real_event(struct perf_event *event)
736 return hns3_pmu_get_event_type(event) << 8 |
737 hns3_pmu_get_subevent(event);
777 struct perf_event *event)
779 return hns3_pmu_get_real_event(target) == hns3_pmu_get_real_event(event);
783 struct perf_event *event)
796 if (!hns3_pmu_cmp_event(sibling, event))
800 if (sibling->group_leader == event->group_leader)
804 /* No related event and all hardware events are used up */
808 /* No related event and there is extra hardware events can be use */
890 static struct hns3_pmu_event_attr *hns3_pmu_get_pmu_event(u32 event)
904 if (event == pmu_event->event)
911 static int hns3_pmu_set_func_mode(struct perf_event *event,
914 struct hw_perf_event *hwc = &event->hw;
915 u16 bdf = hns3_pmu_get_bdf(event);
925 static int hns3_pmu_set_func_queue_mode(struct perf_event *event,
928 u16 queue_id = hns3_pmu_get_queue(event);
929 struct hw_perf_event *hwc = &event->hw;
930 u16 bdf = hns3_pmu_get_bdf(event);
946 hns3_pmu_is_enabled_global_mode(struct perf_event *event,
949 u8 global = hns3_pmu_get_global(event);
957 static bool hns3_pmu_is_enabled_func_mode(struct perf_event *event,
960 u16 queue_id = hns3_pmu_get_queue(event);
961 u16 bdf = hns3_pmu_get_bdf(event);
972 hns3_pmu_is_enabled_func_queue_mode(struct perf_event *event,
975 u16 queue_id = hns3_pmu_get_queue(event);
976 u16 bdf = hns3_pmu_get_bdf(event);
986 static bool hns3_pmu_is_enabled_port_mode(struct perf_event *event,
989 u8 tc_id = hns3_pmu_get_tc(event);
998 hns3_pmu_is_enabled_port_tc_mode(struct perf_event *event,
1001 u8 tc_id = hns3_pmu_get_tc(event);
1010 hns3_pmu_is_enabled_func_intr_mode(struct perf_event *event,
1014 u16 bdf = hns3_pmu_get_bdf(event);
1022 static int hns3_pmu_select_filter_mode(struct perf_event *event,
1025 u32 event_id = hns3_pmu_get_event(event);
1026 struct hw_perf_event *hwc = &event->hw;
1031 pci_err(hns3_pmu->pdev, "Invalid pmu event\n");
1035 if (hns3_pmu_is_enabled_global_mode(event, pmu_event)) {
1040 if (hns3_pmu_is_enabled_func_mode(event, pmu_event))
1041 return hns3_pmu_set_func_mode(event, hns3_pmu);
1043 if (hns3_pmu_is_enabled_func_queue_mode(event, pmu_event))
1044 return hns3_pmu_set_func_queue_mode(event, hns3_pmu);
1046 if (hns3_pmu_is_enabled_port_mode(event, pmu_event)) {
1051 if (hns3_pmu_is_enabled_port_tc_mode(event, pmu_event)) {
1056 if (hns3_pmu_is_enabled_func_intr_mode(event, hns3_pmu, pmu_event)) {
1064 static bool hns3_pmu_validate_event_group(struct perf_event *event)
1066 struct perf_event *sibling, *leader = event->group_leader;
1073 if (leader->pmu != event->pmu)
1076 if (leader != event && !hns3_pmu_cmp_event(leader, event))
1077 event_group[counters++] = event;
1080 for_each_sibling_event(sibling, event->group_leader) {
1084 if (sibling->pmu != event->pmu)
1099 static u32 hns3_pmu_get_filter_condition(struct perf_event *event)
1101 struct hw_perf_event *hwc = &event->hw;
1102 u16 intr_id = hns3_pmu_get_intr(event);
1103 u8 port_id = hns3_pmu_get_port(event);
1104 u16 bdf = hns3_pmu_get_bdf(event);
1105 u8 tc_id = hns3_pmu_get_tc(event);
1126 static void hns3_pmu_config_filter(struct perf_event *event)
1128 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu);
1129 u8 event_type = hns3_pmu_get_event_type(event);
1130 u8 subevent_id = hns3_pmu_get_subevent(event);
1131 u16 queue_id = hns3_pmu_get_queue(event);
1132 struct hw_perf_event *hwc = &event->hw;
1134 u16 bdf = hns3_pmu_get_bdf(event);
1144 val = hns3_pmu_get_filter_condition(event);
1208 static u64 hns3_pmu_read_counter(struct perf_event *event)
1210 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu);
1212 return hns3_pmu_readq(hns3_pmu, event->hw.event_base, event->hw.idx);
1215 static void hns3_pmu_write_counter(struct perf_event *event, u64 value)
1217 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu);
1218 u32 idx = event->hw.idx;
1224 static void hns3_pmu_init_counter(struct perf_event *event)
1226 struct hw_perf_event *hwc = &event->hw;
1229 hns3_pmu_write_counter(event, 0);
1232 static int hns3_pmu_event_init(struct perf_event *event)
1234 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu);
1235 struct hw_perf_event *hwc = &event->hw;
1239 if (event->attr.type != event->pmu->type)
1243 if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK)
1246 event->cpu = hns3_pmu->on_cpu;
1257 ret = hns3_pmu_select_filter_mode(event, hns3_pmu);
1263 if (!hns3_pmu_validate_event_group(event)) {
1264 pci_err(hns3_pmu->pdev, "Invalid event group.\n");
1268 if (hns3_pmu_get_ext_counter_used(event))
1276 static void hns3_pmu_read(struct perf_event *event)
1278 struct hw_perf_event *hwc = &event->hw;
1283 new_cnt = hns3_pmu_read_counter(event);
1288 local64_add(delta, &event->count);
1291 static void hns3_pmu_start(struct perf_event *event, int flags)
1293 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu);
1294 struct hw_perf_event *hwc = &event->hw;
1302 hns3_pmu_config_filter(event);
1303 hns3_pmu_init_counter(event);
1307 perf_event_update_userpage(event);
1310 static void hns3_pmu_stop(struct perf_event *event, int flags)
1312 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu);
1313 struct hw_perf_event *hwc = &event->hw;
1325 hns3_pmu_read(event);
1329 static int hns3_pmu_add(struct perf_event *event, int flags)
1331 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu);
1332 struct hw_perf_event *hwc = &event->hw;
1337 /* Check all working events to find a related event. */
1338 idx = hns3_pmu_find_related_event_idx(hns3_pmu, event);
1342 /* Current event shares an enabled hardware event with related event */
1353 hns3_pmu->hw_events[idx] = event;
1357 hns3_pmu_start(event, PERF_EF_RELOAD);
1362 static void hns3_pmu_del(struct perf_event *event, int flags)
1364 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu);
1365 struct hw_perf_event *hwc = &event->hw;
1367 hns3_pmu_stop(event, PERF_EF_UPDATE);
1369 perf_event_update_userpage(event);