Lines Matching refs:base
98 void __iomem *base;
359 void __iomem *base = pmu->base;
366 base += ddr_perf_is_enhanced_filtered(event) ? COUNTER_DPCR1 :
368 return readl_relaxed(base + counter * 4);
431 writel(0, pmu->base + reg);
445 writel(val, pmu->base + reg);
448 val = readl_relaxed(pmu->base + reg) & CNTL_EN_MASK;
449 writel(val, pmu->base + reg);
457 val = readl_relaxed(pmu->base + counter * 4 + COUNTER_CNTL);
467 val = readl_relaxed(pmu->base + reg);
469 writel(val, pmu->base + reg);
472 writel(val, pmu->base + reg);
546 writel(cfg1, pmu->base + COUNTER_DPCR1);
603 static int ddr_perf_init(struct ddr_pmu *pmu, void __iomem *base,
621 .base = base,
694 void __iomem *base;
700 base = devm_platform_ioremap_resource(pdev, 0);
701 if (IS_ERR(base))
702 return PTR_ERR(base);
710 num = ddr_perf_init(pmu, base, &pdev->dev);