Lines Matching defs:value
496 static u64 armv8pmu_bias_long_counter(struct perf_event *event, u64 value)
499 value |= GENMASK_ULL(63, 32);
501 return value;
504 static u64 armv8pmu_unbias_long_counter(struct perf_event *event, u64 value)
507 value &= ~GENMASK_ULL(63, 32);
509 return value;
516 u64 value;
519 value = read_pmccntr();
521 value = armv8pmu_read_hw_counter(event);
523 return armv8pmu_unbias_long_counter(event, value);
526 static inline void armv8pmu_write_evcntr(int idx, u64 value)
530 write_pmevcntrn(counter, value);
534 u64 value)
539 armv8pmu_write_evcntr(idx, upper_32_bits(value));
540 armv8pmu_write_evcntr(idx - 1, lower_32_bits(value));
542 armv8pmu_write_evcntr(idx, value);
546 static void armv8pmu_write_counter(struct perf_event *event, u64 value)
551 value = armv8pmu_bias_long_counter(event, value);
554 write_pmccntr(value);
556 armv8pmu_write_hw_counter(event, value);
673 u32 value;
676 value = read_pmovsclr();
679 value &= ARMV8_PMU_OVSR_MASK;
680 write_pmovsclr(value);
682 return value;
690 * The current PMUSERENR_EL0 value might be the value for the guest.
691 * If that's the case, have KVM keep tracking of the register value
1420 * 32-bit value (now specifies a 64-bit value) - refer