Lines Matching defs:pdev
701 static void quirk_amd_dwc_class(struct pci_dev *pdev)
703 u32 class = pdev->class;
707 pdev->class = PCI_CLASS_SERIAL_USB_DEVICE;
708 pci_info(pdev,
710 class, pdev->class);
725 static void quirk_synopsys_haps(struct pci_dev *pdev)
727 u32 class = pdev->class;
729 switch (pdev->device) {
733 pdev->class = PCI_CLASS_SERIAL_USB_DEVICE;
734 pci_info(pdev, "PCI class overridden (%#08x -> %#08x) so dwc3 driver can claim this instead of xhci\n",
735 class, pdev->class);
1053 struct pci_dev *pdev;
1057 list_for_each_entry(pdev, &dev->subordinate->devices, bus_list) {
1058 pci_read_config_word(pdev, PCI_COMMAND, &command);
1060 pci_write_config_word(pdev, PCI_COMMAND, command & ~PCI_COMMAND_FAST_BACK);
1368 static void quirk_disable_pxb(struct pci_dev *pdev)
1372 if (pdev->revision != 0x04) /* Only C0 requires this */
1374 pci_read_config_word(pdev, 0x40, &config);
1377 pci_write_config_word(pdev, 0x40, config);
1378 pci_info(pdev, "C0 revision 450NX. Disabling PCI restreaming\n");
1384 static void quirk_amd_ide_mode(struct pci_dev *pdev)
1389 pci_read_config_byte(pdev, PCI_CLASS_DEVICE, &tmp);
1391 pci_read_config_byte(pdev, 0x40, &tmp);
1392 pci_write_config_byte(pdev, 0x40, tmp|1);
1393 pci_write_config_byte(pdev, 0x9, 1);
1394 pci_write_config_byte(pdev, 0xa, 6);
1395 pci_write_config_byte(pdev, 0x40, tmp);
1397 pdev->class = PCI_CLASS_STORAGE_SATA_AHCI;
1398 pci_info(pdev, "set SATA to AHCI mode\n");
1411 static void quirk_svwks_csb5ide(struct pci_dev *pdev)
1414 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
1417 pdev->class &= ~5;
1418 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
1425 static void quirk_ide_samemode(struct pci_dev *pdev)
1429 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
1432 pci_info(pdev, "IDE mode mismatch; forcing legacy mode\n");
1434 pdev->class &= ~5;
1435 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
1441 static void quirk_no_ata_d3(struct pci_dev *pdev)
1443 pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
1805 static void quirk_jmicron_ata(struct pci_dev *pdev)
1811 if (PCI_FUNC(pdev->devfn))
1814 pci_read_config_dword(pdev, 0x40, &conf1);
1815 pci_read_config_dword(pdev, 0x80, &conf5);
1820 switch (pdev->device) {
1847 pci_write_config_dword(pdev, 0x40, conf1);
1848 pci_write_config_dword(pdev, 0x80, conf5);
1850 /* Update pdev accordingly */
1851 pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr);
1852 pdev->hdr_type = hdr & 0x7f;
1853 pdev->multifunction = !!(hdr & 0x80);
1855 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class);
1856 pdev->class = class >> 8;
1892 static void quirk_alder_ioapic(struct pci_dev *pdev)
1896 if ((pdev->class >> 8) != 0xff00)
1904 if (pci_resource_start(pdev, 0) && pci_resource_len(pdev, 0))
1905 insert_resource(&iomem_resource, &pdev->resource[0]);
1912 memset(&pdev->resource[i], 0, sizeof(pdev->resource[i]));
1929 static void quirk_pcie_mch(struct pci_dev *pdev)
1931 pdev->no_msi = 1;
1951 static void quirk_huawei_pcie_sva(struct pci_dev *pdev)
1958 if (pdev->revision != 0x21 && pdev->revision != 0x30)
1961 pdev->pasid_no_tlp = 1;
1967 if (!pdev->dev.of_node &&
1968 device_create_managed_software_node(&pdev->dev, properties, NULL))
1969 pci_warn(pdev, "could not add stall property");
2764 struct pci_dev *pdev;
2770 pdev = pci_get_slot(dev->bus, 0);
2771 if (!pdev)
2773 if (!msi_ht_cap_enabled(pdev))
2775 pci_dev_put(pdev);
3661 static void mellanox_check_broken_intx_masking(struct pci_dev *pdev)
3672 if (pdev->device == mellanox_broken_intx_devs[i]) {
3673 pdev->broken_intx_masking = 1;
3682 if (pdev->device == PCI_DEVICE_ID_MELLANOX_CONNECTIB)
3685 if (pdev->device != PCI_DEVICE_ID_MELLANOX_CONNECTX4 &&
3686 pdev->device != PCI_DEVICE_ID_MELLANOX_CONNECTX4_LX)
3690 if (pci_enable_device_mem(pdev)) {
3691 pci_warn(pdev, "Can't enable device memory\n");
3695 fw_ver = ioremap(pci_resource_start(pdev, 0), 4);
3697 pci_warn(pdev, "Can't map ConnectX-4 initialization segment\n");
3709 pci_warn(pdev, "ConnectX-4: FW %u.%u.%u doesn't support INTx masking, disabling. Please upgrade FW to %d.14.1100 and up for INTx support\n",
3710 fw_major, fw_minor, fw_subminor, pdev->device ==
3712 pdev->broken_intx_masking = 1;
3718 pci_disable_device(pdev);
3810 static void quirk_thunderbolt_hotplug_msi(struct pci_dev *pdev)
3812 if (pdev->is_hotplug_bridge &&
3813 (pdev->device != PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C ||
3814 pdev->revision <= 1))
3815 pdev->no_msi = 1;
4135 static int reset_hinic_vf_dev(struct pci_dev *pdev, bool probe)
4144 bar = pci_iomap(pdev, 0, 0);
4151 pci_iounmap(pdev, bar);
4160 pcie_flr(pdev);
4167 pci_write_config_word(pdev, PCI_VENDOR_ID, 0);
4182 pci_warn(pdev, "Reset dev timeout, FLR ack reg: %#010x\n", val);
4185 pci_iounmap(pdev, bar);
4349 * is not a PCIe-to-PCI bridge, then @pdev is actually a PCIe-to-PCI bridge.
4351 static void quirk_use_pcie_bridge_dma_alias(struct pci_dev *pdev)
4353 if (!pci_is_root_bus(pdev->bus) &&
4354 pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
4355 !pci_is_pcie(pdev) && pci_is_pcie(pdev->bus->self) &&
4356 pci_pcie_type(pdev->bus->self) != PCI_EXP_TYPE_PCI_BRIDGE)
4357 pdev->dev_flags |= PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS;
4377 static void quirk_mic_x200_dma_alias(struct pci_dev *pdev)
4379 pci_add_dma_alias(pdev, PCI_DEVFN(0x10, 0x0), 1);
4380 pci_add_dma_alias(pdev, PCI_DEVFN(0x11, 0x0), 1);
4381 pci_add_dma_alias(pdev, PCI_DEVFN(0x12, 0x3), 1);
4400 static void quirk_pex_vca_alias(struct pci_dev *pdev)
4406 pci_add_dma_alias(pdev, PCI_DEVFN(slot, 0x0), 5);
4420 static void quirk_bridge_cavm_thrx2_pcie_root(struct pci_dev *pdev)
4422 pdev->dev_flags |= PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT;
4433 static void quirk_tw686x_class(struct pci_dev *pdev)
4435 u32 class = pdev->class;
4438 pdev->class = (PCI_CLASS_MULTIMEDIA_OTHER << 8) | 0x01;
4439 pci_info(pdev, "TW686x PCI class overridden (%#08x -> %#08x)\n",
4440 class, pdev->class);
4563 static void quirk_disable_root_port_attributes(struct pci_dev *pdev)
4565 struct pci_dev *root_port = pcie_find_root_port(pdev);
4568 pci_warn(pdev, "PCIe Completion erratum may cause device errors\n");
4573 dev_name(&pdev->dev));
4583 static void quirk_chelsio_T5_disable_root_port_attributes(struct pci_dev *pdev)
4591 if ((pdev->device & 0xff00) == 0x5400)
4592 quirk_disable_root_port_attributes(pdev);
5406 static void quirk_intel_qat_vf_cap(struct pci_dev *pdev)
5414 if (pdev->pcie_cap || pci_find_capability(pdev, PCI_CAP_ID_EXP))
5418 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
5426 pci_read_config_byte(pdev, pos + 1, &next_cap);
5439 pci_read_config_word(pdev, pos, ®16);
5447 pdev->pcie_cap = pos;
5448 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, ®16);
5449 pdev->pcie_flags_reg = reg16;
5450 pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, ®16);
5451 pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
5453 pdev->cfg_size = PCI_CFG_SPACE_EXP_SIZE;
5454 ret = pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &status);
5456 pdev->cfg_size = PCI_CFG_SPACE_SIZE;
5458 if (pci_find_saved_cap(pdev, PCI_CAP_ID_EXP))
5470 pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &cap[i++]);
5471 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &cap[i++]);
5472 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &cap[i++]);
5473 pcie_capability_read_word(pdev, PCI_EXP_RTCTL, &cap[i++]);
5474 pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &cap[i++]);
5475 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL2, &cap[i++]);
5476 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL2, &cap[i++]);
5477 hlist_add_head(&state->next, &pdev->saved_cap_space);
5511 static void quirk_no_ext_tags(struct pci_dev *pdev)
5513 struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus);
5519 pci_info(pdev, "disabling Extended Tags (this device can't handle them)\n");
5533 static void quirk_no_ats(struct pci_dev *pdev)
5535 pci_info(pdev, "disabling ATS\n");
5536 pdev->ats_cap = 0;
5544 static void quirk_amd_harvest_no_ats(struct pci_dev *pdev)
5546 if (pdev->device == 0x15d8) {
5547 if (pdev->revision == 0xcf &&
5548 pdev->subsystem_vendor == 0xea50 &&
5549 (pdev->subsystem_device == 0xce19 ||
5550 pdev->subsystem_device == 0xcc10 ||
5551 pdev->subsystem_device == 0xcc08))
5552 quirk_no_ats(pdev);
5554 quirk_no_ats(pdev);
5583 static void quirk_intel_e2000_no_ats(struct pci_dev *pdev)
5585 if (pdev->revision < 0x20)
5586 quirk_no_ats(pdev);
5600 static void quirk_fsl_no_msi(struct pci_dev *pdev)
5602 if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
5603 pdev->no_msi = 1;
5615 static void pci_create_device_link(struct pci_dev *pdev, unsigned int consumer,
5621 if (PCI_FUNC(pdev->devfn) != consumer)
5624 supplier_pdev = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus),
5625 pdev->bus->number,
5626 PCI_DEVFN(PCI_SLOT(pdev->devfn), supplier));
5632 if (device_link_add(&pdev->dev, &supplier_pdev->dev,
5634 pci_info(pdev, "D0 power state depends on %s\n",
5637 pci_err(pdev, "Cannot enforce power dependency on %s\n",
5640 pm_runtime_allow(&pdev->dev);
5782 static void quirk_switchtec_ntb_dma_alias(struct pci_dev *pdev)
5791 if (pci_enable_device(pdev)) {
5792 pci_err(pdev, "Cannot enable Switchtec device\n");
5796 mmio = pci_iomap(pdev, 0, 0);
5798 pci_disable_device(pdev);
5799 pci_err(pdev, "Cannot iomap Switchtec device\n");
5803 pci_info(pdev, "Setting Switchtec proxy ID aliases\n");
5822 pci_dbg(pdev, "Processing partition %d\n", pp);
5828 pci_warn(pdev, "Partition %d table_sz 0\n", pp);
5833 pci_warn(pdev,
5845 pci_dbg(pdev,
5848 pci_add_dma_alias(pdev, devfn, 1);
5852 pci_iounmap(pdev, mmio);
5853 pci_disable_device(pdev);
5959 static void quirk_plx_ntb_dma_alias(struct pci_dev *pdev)
5961 pci_info(pdev, "Setting PLX NTB proxy ID aliases\n");
5963 pci_add_dma_alias(pdev, 0, 256);
5984 static void quirk_reset_lenovo_thinkpad_p50_nvgpu(struct pci_dev *pdev)
5989 if (pdev->subsystem_vendor != PCI_VENDOR_ID_LENOVO ||
5990 pdev->subsystem_device != 0x222e ||
5991 !pci_reset_supported(pdev))
5994 if (pci_enable_device_mem(pdev))
6001 map = pci_iomap(pdev, 0, 0x23000);
6003 pci_err(pdev, "Can't map MMIO space\n");
6012 pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
6013 ret = pci_reset_bus(pdev);
6015 pci_err(pdev, "Failed to reset GPU: %d\n", ret);
6020 pci_disable_device(pdev);
6059 static void apex_pci_fixup_class(struct pci_dev *pdev)
6061 pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) | pdev->class;
6077 static void pci_fixup_pericom_acs_store_forward(struct pci_dev *pdev)
6083 if (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM)
6087 if (!pdev->acs_cap)
6089 pci_read_config_word(pdev, pdev->acs_cap + PCI_ACS_CTRL, &val);
6093 upstream = pci_upstream_bridge(pdev);
6121 static void nvidia_ion_ahci_fixup(struct pci_dev *pdev)
6123 pdev->dev_flags |= PCI_DEV_FLAGS_HAS_MSI_MASKING;
6244 static void pci_fixup_d3cold_delay_1sec(struct pci_dev *pdev)
6246 pdev->d3cold_delay = 1000;