Lines Matching defs:enable
311 * Deal with broken BIOSes that neglect to enable passive release,
760 static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
766 if ((devres & enable) != enable)
786 static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
792 if ((devres & enable) != enable)
867 u8 enable;
876 pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
877 if (enable & ICH4_ACPI_EN)
881 pci_read_config_byte(dev, ICH4_GPIO_CNTL, &enable);
882 if (enable & ICH4_GPIO_EN)
899 u8 enable;
901 pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
902 if (enable & ICH6_ACPI_EN)
906 pci_read_config_byte(dev, ICH6_GPIO_CNTL, &enable);
907 if (enable & ICH6_GPIO_EN)
1303 pci_warn(dev, "BIOS failed to enable PCI standards compliance; fixing this error\n");
1688 /* enable the SMBus device */
1738 * We can also enable the sis96x bit in the discovery register..
2438 * re-enable them when it's ready.
2780 /* Force enable MSI mapping capability on HT bridges */
3030 /* don't enable end_device/host_bridge with leaf directly here */
3096 /* it is not enabled, try to enable it */
3329 * 0x150 - SD2.0 mode enable for changing base clock
3691 pci_warn(pdev, "Can't enable device memory\n");
4000 * So we briefly re-enable MSI-X interrupts for the duration of the
4110 * timeout waiting for ready status to change after NVMe enable if the driver
4620 * Such devices effectively enable request redirect (RR) and completion
5275 pci_warn(dev, "Failed to enable Intel PCH ACS quirk\n");
5540 * Some devices require additional driver setup to enable ATS. Don't use
5768 /* Re-enable ACS_SV if it was previously enabled */
5792 pci_err(pdev, "Cannot enable Switchtec device\n");
6105 * Apply fixup on enable and on resume, in order to apply the fix up whenever