Lines Matching defs:device
69 * Some device drivers need know if PCI is initiated.
71 * is no device to be found on the pci_bus_type.
75 struct device *dev;
88 static void release_pcibus_dev(struct device *dev)
169 * @dev: the PCI device
203 * All bits set in sz means the device isn't working properly.
299 * be claimed by the device.
364 * use prefetching on this device.
366 if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001)
568 static void pci_release_host_bridge_dev(struct device *dev)
623 struct pci_host_bridge *devm_pci_alloc_host_bridge(struct device *dev,
866 * created by an SR-IOV device. Walk up to the first bridge device
882 struct device *parent = bridge->dev.parent;
1107 * Initialize some portions of the bus device, but don't register
1562 * device is also downstream port assume pdev is actually
1573 * device is also upstream port assume pdev is actually
1597 /* Is the device part of a Thunderbolt controller? */
1608 * If the upstream bridge is untrusted we treat this device
1622 * device to be removable by the user. We're mainly concerned with
1638 * @dev: PCI device
1647 * comparing the first dword of each potential alias to the vendor/device ID.
1674 * pci_cfg_space_size_ext - Get the configuration space size of the PCI device
1675 * @dev: PCI device
1678 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
1680 * accesses, or the device is behind a reverse Express bridge. So we try
1751 static void pci_subsystem_ids(struct pci_dev *dev, u16 *vendor, u16 *device)
1756 *device = dev->physfn->sriov->subsystem_device;
1761 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, device);
1780 * @dev: PCI device
1798 * r2.3, so strictly speaking, a device is not *broken* if it's not
1821 * pci_setup_device - Fill in class and map information of a device
1822 * @dev: the device structure to fill
1824 * Initialize the device structure with information about the device's
1827 * Returns 0 on success and negative if unknown type of device (not normal,
1891 dev->vendor, dev->device, dev->hdr_type, dev->class);
1899 pci_info(dev, "device has non-compliant BARs; disabling IO/MEM decoding\n");
1989 pci_err(dev, "unknown header type %02x, ignoring device\n",
2000 /* We found a fine healthy device, go go go... */
2100 * If some device in the hierarchy doesn't handle Extended Tags
2122 * @dev: PCI device to query
2124 * Returns true if the device has enabled relaxed ordering attribute.
2209 * If we're configuring a hot-added device, LTR was likely
2211 * it in the new device.
2288 * pci_release_dev - Free a PCI device structure when all users of it are
2290 * @dev: device that's been disconnected
2292 * Will be called only by the device core when all users of this PCI device are
2295 static void pci_release_dev(struct device *dev)
2306 dev_dbg(dev, "device released\n");
2412 bridge->device == 0x80b5)
2421 * Read the config data for a PCI device, sanity-check it,
2438 dev->device = (l >> 16) & 0xffff;
2454 /* Look from the device up to avoid downstream ports with no devices */
2464 /* Print link status only if the device is constrained by the fabric */
2498 * per-device basis should be called from here.
2529 * device-specific MSI domain, then inherit the default domain
2568 * Add the device to our list of discovered devices
2702 /* Only one slot has PCIe device */
2719 * drivers attached. A hot-added device might support only the minimum
2724 * However, if we hot-add a device to a slot directly below a Root
2727 * reconfigure MPS on both the Root Port and the hot-added device,
2760 * Configure the device MPS with the smaller of the
2761 * device MPSS or the bridge MPS (which is assumed to be
2787 * device or the bus can support. This should already be properly
3041 struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
3204 struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
3304 * pci_rescan_bus(), pci_rescan_bus_bridge_resize() and PCI device removal
3321 static int __init pci_sort_bf_cmp(const struct device *d_a,
3322 const struct device *d_b)