Lines Matching defs:link
3 * Enable PCIe link L0s/L1 state and Clock Power Management
48 struct pcie_link_state *root; /* pointer to the root port link */
107 static int policy_to_aspm_state(struct pcie_link_state *link)
120 return link->aspm_default;
125 static int policy_to_clkpm_state(struct pcie_link_state *link)
136 return link->clkpm_default;
141 static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable)
144 struct pci_bus *linkbus = link->pdev->subordinate;
151 link->clkpm_enabled = !!enable;
154 static void pcie_set_clkpm(struct pcie_link_state *link, int enable)
157 * Don't enable Clock PM if the link is not Clock PM capable
160 if (!link->clkpm_capable || link->clkpm_disable)
163 if (link->clkpm_enabled == enable)
165 pcie_set_clkpm_nocheck(link, enable);
168 static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
174 struct pci_bus *linkbus = link->pdev->subordinate;
188 link->clkpm_enabled = enabled;
189 link->clkpm_default = enabled;
190 link->clkpm_capable = capable;
191 link->clkpm_disable = blacklist ? 1 : 0;
195 * pcie_aspm_configure_common_clock: check if the 2 ends of a link
199 static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
203 struct pci_dev *child, *parent = link->pdev;
254 if (pcie_retrain_link(link->pdev, true)) {
364 struct pcie_link_state *link;
371 link = endpoint->bus->self->link_state;
381 while (link) {
382 struct pci_dev *dev = pci_function_0(link->pdev->subordinate);
385 pcie_capability_read_dword(link->pdev, PCI_EXP_LNKCAP,
395 if ((link->aspm_capable & ASPM_STATE_L0S_UP) &&
397 link->aspm_capable &= ~ASPM_STATE_L0S_UP;
400 if ((link->aspm_capable & ASPM_STATE_L0S_DW) &&
402 link->aspm_capable &= ~ASPM_STATE_L0S_DW;
417 if ((link->aspm_capable & ASPM_STATE_L1) &&
419 link->aspm_capable &= ~ASPM_STATE_L1;
422 link = link->parent;
438 static void aspm_calc_l12_info(struct pcie_link_state *link,
441 struct pci_dev *child = link->downstream, *parent = link->pdev;
527 static void aspm_l1ss_init(struct pcie_link_state *link)
529 struct pci_dev *child = link->downstream, *parent = link->pdev;
556 link->aspm_support |= ASPM_STATE_L1_1;
558 link->aspm_support |= ASPM_STATE_L1_2;
560 link->aspm_support |= ASPM_STATE_L1_1_PCIPM;
562 link->aspm_support |= ASPM_STATE_L1_2_PCIPM;
572 link->aspm_enabled |= ASPM_STATE_L1_1;
574 link->aspm_enabled |= ASPM_STATE_L1_2;
576 link->aspm_enabled |= ASPM_STATE_L1_1_PCIPM;
578 link->aspm_enabled |= ASPM_STATE_L1_2_PCIPM;
580 if (link->aspm_support & ASPM_STATE_L1_2_MASK)
581 aspm_calc_l12_info(link, parent_l1ss_cap, child_l1ss_cap);
584 static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
586 struct pci_dev *child = link->downstream, *parent = link->pdev;
593 link->aspm_enabled = ASPM_STATE_ALL;
594 link->aspm_disable = ASPM_STATE_ALL;
599 * If ASPM not supported, don't mess with the clocks and link,
608 pcie_aspm_configure_common_clock(link);
625 * given link unless components on both sides of the link each
629 link->aspm_support |= ASPM_STATE_L0S;
632 link->aspm_enabled |= ASPM_STATE_L0S_UP;
634 link->aspm_enabled |= ASPM_STATE_L0S_DW;
638 link->aspm_support |= ASPM_STATE_L1;
641 link->aspm_enabled |= ASPM_STATE_L1;
643 aspm_l1ss_init(link);
646 link->aspm_default = link->aspm_enabled;
649 link->aspm_capable = link->aspm_support;
662 static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state)
665 struct pci_dev *child = link->downstream, *parent = link->pdev;
667 enable_req = (link->aspm_enabled ^ state) & state;
721 static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)
724 struct pci_dev *child = link->downstream, *parent = link->pdev;
728 state &= (link->aspm_capable & ~link->aspm_disable);
737 state |= (link->aspm_enabled & ASPM_STATE_L1_SS_PCIPM);
740 /* Nothing to do if the link is already in the requested state */
741 if (link->aspm_enabled == state)
753 if (link->aspm_capable & ASPM_STATE_L1SS)
754 pcie_config_aspm_l1ss(link, state);
769 link->aspm_enabled = state;
772 static void pcie_config_aspm_path(struct pcie_link_state *link)
774 while (link) {
775 pcie_config_aspm_link(link, policy_to_aspm_state(link));
776 link = link->parent;
780 static void free_link_state(struct pcie_link_state *link)
782 link->pdev->link_state = NULL;
783 kfree(link);
823 struct pcie_link_state *link;
825 link = kzalloc(sizeof(*link), GFP_KERNEL);
826 if (!link)
829 INIT_LIST_HEAD(&link->sibling);
830 link->pdev = pdev;
831 link->downstream = pci_function_0(pdev->subordinate);
837 * a switch may become the root of the link state chain for all
843 link->root = link;
849 kfree(link);
853 link->parent = parent;
854 link->root = link->parent->root;
857 list_add(&link->sibling, &link_list);
858 pdev->link_state = link;
859 return link;
871 * pcie_aspm_init_link_state: Initiate PCI express link state.
877 struct pcie_link_state *link;
904 link = alloc_pcie_link_state(pdev);
905 if (!link)
912 pcie_aspm_cap_init(link, blacklist);
915 pcie_clkpm_cap_init(link, blacklist);
919 * link policy setting. Enabling ASPM on broken hardware can cripple
927 pcie_config_aspm_path(link);
928 pcie_set_clkpm(link, policy_to_clkpm_state(link));
942 struct pcie_link_state *link;
944 list_for_each_entry(link, &link_list, sibling) {
945 if (link->root != root)
947 link->aspm_capable = link->aspm_support;
949 list_for_each_entry(link, &link_list, sibling) {
951 struct pci_bus *linkbus = link->pdev->subordinate;
952 if (link->root != root)
967 struct pcie_link_state *link, *root, *parent_link;
975 link = parent->link_state;
976 root = link->root;
977 parent_link = link->parent;
980 * link->downstream is a pointer to the pci_dev of function 0. If
982 * so we can't use link->downstream again. Free the link state to
986 * retain the link state, but PCIe r6.0, sec 7.5.3.7, recommends
990 pcie_config_aspm_link(link, 0);
991 list_del(&link->sibling);
992 free_link_state(link);
1007 struct pcie_link_state *link = pdev->link_state;
1009 if (aspm_disabled || !link)
1017 pcie_update_aspm_capable(link->root);
1018 pcie_config_aspm_path(link);
1025 struct pcie_link_state *link = pdev->link_state;
1027 if (aspm_disabled || !link)
1036 pcie_config_aspm_path(link);
1037 pcie_set_clkpm(link, policy_to_clkpm_state(link));
1058 struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1060 if (!link)
1079 link->aspm_disable |= ASPM_STATE_L0S;
1082 link->aspm_disable |= ASPM_STATE_L1 | ASPM_STATE_L1SS;
1084 link->aspm_disable |= ASPM_STATE_L1_1;
1086 link->aspm_disable |= ASPM_STATE_L1_2;
1088 link->aspm_disable |= ASPM_STATE_L1_1_PCIPM;
1090 link->aspm_disable |= ASPM_STATE_L1_2_PCIPM;
1091 pcie_config_aspm_link(link, policy_to_aspm_state(link));
1094 link->clkpm_disable = 1;
1095 pcie_set_clkpm(link, policy_to_clkpm_state(link));
1110 * pci_disable_link_state - Disable device's link state, so the link will
1116 * @state: ASPM link state to disable
1126 struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1128 if (!link)
1144 link->aspm_default = 0;
1146 link->aspm_default |= ASPM_STATE_L0S;
1148 link->aspm_default |= ASPM_STATE_L1;
1151 link->aspm_default |= ASPM_STATE_L1_1 | ASPM_STATE_L1;
1153 link->aspm_default |= ASPM_STATE_L1_2 | ASPM_STATE_L1;
1155 link->aspm_default |= ASPM_STATE_L1_1_PCIPM | ASPM_STATE_L1;
1157 link->aspm_default |= ASPM_STATE_L1_2_PCIPM | ASPM_STATE_L1;
1158 pcie_config_aspm_link(link, policy_to_aspm_state(link));
1160 link->clkpm_default = (state & PCIE_LINK_STATE_CLKPM) ? 1 : 0;
1161 pcie_set_clkpm(link, policy_to_clkpm_state(link));
1170 * pci_enable_link_state - Clear and set the default device link state so that
1171 * the link may be allowed to enter the specified states. Note that if the
1177 * @state: Mask of ASPM link states to enable
1186 * pci_enable_link_state_locked - Clear and set the default device link state
1187 * so that the link may be allowed to enter the specified states. Note that if
1193 * @state: Mask of ASPM link states to enable
1209 struct pcie_link_state *link;
1222 list_for_each_entry(link, &link_list, sibling) {
1223 pcie_config_aspm_link(link, policy_to_aspm_state(link));
1224 pcie_set_clkpm(link, policy_to_clkpm_state(link));
1257 struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1259 if (!link)
1262 return link->aspm_enabled;
1271 struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1273 return sysfs_emit(buf, "%d\n", (link->aspm_enabled & state) ? 1 : 0);
1281 struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1291 link->aspm_disable &= ~state;
1294 link->aspm_disable &= ~ASPM_STATE_L1;
1296 link->aspm_disable |= state;
1298 link->aspm_disable |= ASPM_STATE_L1SS;
1301 pcie_config_aspm_link(link, policy_to_aspm_state(link));
1330 struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1332 return sysfs_emit(buf, "%d\n", link->clkpm_enabled);
1340 struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1349 link->clkpm_disable = !state_enable;
1350 pcie_set_clkpm(link, policy_to_clkpm_state(link));
1382 struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1392 if (aspm_disabled || !link)
1396 return link->clkpm_capable ? a->mode : 0;
1398 return link->aspm_capable & aspm_state_map[n - 1] ? a->mode : 0;
1402 .name = "link",