Lines Matching refs:aer

145 	int aer = dev->aer_cap;
148 	if (!aer)
151 	pci_read_config_dword(dev, aer + PCI_ERR_CAP, &reg32);
156 	pci_write_config_dword(dev, aer + PCI_ERR_CAP, reg32);
169 	int aer = dev->aer_cap;
172 	if (!aer)
175 	pci_read_config_dword(dev, aer + PCI_ERR_CAP, &reg32);
177 	pci_write_config_dword(dev, aer + PCI_ERR_CAP, reg32);
248 	int aer = dev->aer_cap;
255 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
256 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, &sev);
259 		pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status);
267 	int aer = dev->aer_cap;
274 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
275 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, &sev);
278 		pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status);
292 	int aer = dev->aer_cap;
296 	if (!aer)
302 		pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, &status);
303 		pci_write_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, status);
306 	pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, &status);
307 	pci_write_config_dword(dev, aer + PCI_ERR_COR_STATUS, status);
309 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
310 	pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status);
325 	int aer = dev->aer_cap;
329 	if (!aer)
337 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, cap++);
338 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, cap++);
339 	pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, cap++);
340 	pci_read_config_dword(dev, aer + PCI_ERR_CAP, cap++);
342 		pci_read_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, cap++);
347 	int aer = dev->aer_cap;
351 	if (!aer)
359 	pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, *cap++);
360 	pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, *cap++);
361 	pci_write_config_dword(dev, aer + PCI_ERR_COR_MASK, *cap++);
362 	pci_write_config_dword(dev, aer + PCI_ERR_CAP, *cap++);
364 		pci_write_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, *cap++);
765 		    struct aer_capability_regs *aer)
772 		status = aer->cor_status;
773 		mask = aer->cor_mask;
775 		status = aer->uncor_status;
776 		mask = aer->uncor_mask;
787 	info.first_error = PCI_ERR_CAP_FEP(aer->cap_control);
796 			aer->uncor_severity);
799 		__print_tlp_header(dev, &aer->header_log);
802 			aer_severity, tlp_header_valid, &aer->header_log);
828 	int aer = dev->aer_cap;
863 	if (!aer)
868 		pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, &status);
869 		pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, &mask);
871 		pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
872 		pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, &mask);
951 	int aer = dev->aer_cap;
958 		if (aer)
959 			pci_write_config_dword(dev, aer + PCI_ERR_COR_STATUS,
1066 	int aer = dev->aer_cap;
1074 	if (!aer)
1078 		pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS,
1080 		pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK,
1090 		pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS,
1092 		pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK,
1098 		pci_read_config_dword(dev, aer + PCI_ERR_CAP, &temp);
1104 				aer + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
1106 				aer + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
1108 				aer + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
1110 				aer + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
1216 	int aer = rp->aer_cap;
1219 	pci_read_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, &e_src.status);
1223 	pci_read_config_dword(rp, aer + PCI_ERR_ROOT_ERR_SRC, &e_src.id);
1224 	pci_write_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, e_src.status);
1241 	int aer = pdev->aer_cap;
1254 	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, &reg32);
1255 	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, reg32);
1256 	pci_read_config_dword(pdev, aer + PCI_ERR_COR_STATUS, &reg32);
1257 	pci_write_config_dword(pdev, aer + PCI_ERR_COR_STATUS, reg32);
1258 	pci_read_config_dword(pdev, aer + PCI_ERR_UNCOR_STATUS, &reg32);
1259 	pci_write_config_dword(pdev, aer + PCI_ERR_UNCOR_STATUS, reg32);
1262 	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, &reg32);
1264 	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32);
1276 	int aer = pdev->aer_cap;
1280 	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, &reg32);
1282 	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32);
1285 	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, &reg32);
1286 	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, reg32);
1355 	int aer;
1375 	aer = root ? root->aer_cap : 0;
1377 	if ((host->native_aer || pcie_ports_native) && aer) {
1379 		pci_read_config_dword(root, aer + PCI_ERR_ROOT_COMMAND, &reg32);
1381 		pci_write_config_dword(root, aer + PCI_ERR_ROOT_COMMAND, reg32);
1396 	if ((host->native_aer || pcie_ports_native) && aer) {
1398 		pci_read_config_dword(root, aer + PCI_ERR_ROOT_STATUS, &reg32);
1399 		pci_write_config_dword(root, aer + PCI_ERR_ROOT_STATUS, reg32);
1402 		pci_read_config_dword(root, aer + PCI_ERR_ROOT_COMMAND, &reg32);
1404 		pci_write_config_dword(root, aer + PCI_ERR_ROOT_COMMAND, reg32);
1411 	.name		= "aer",