Lines Matching refs:ctrl
48 static inline struct pci_dev *ctrl_dev(struct controller *ctrl)
50 return ctrl->pcie->port;
57 static inline int pciehp_request_irq(struct controller *ctrl)
59 int retval, irq = ctrl->pcie->irq;
62 ctrl->poll_thread = kthread_run(&pciehp_poll, ctrl,
64 slot_name(ctrl));
65 return PTR_ERR_OR_ZERO(ctrl->poll_thread);
70 IRQF_SHARED, "pciehp", ctrl);
72 ctrl_err(ctrl, "Cannot get irq %d for the hotplug controller\n",
77 static inline void pciehp_free_irq(struct controller *ctrl)
80 kthread_stop(ctrl->poll_thread);
82 free_irq(ctrl->pcie->irq, ctrl);
85 static int pcie_poll_cmd(struct controller *ctrl, int timeout)
87 struct pci_dev *pdev = ctrl_dev(ctrl);
93 ctrl_info(ctrl, "%s: no response from device\n",
101 ctrl->cmd_busy = 0;
111 static void pcie_wait_cmd(struct controller *ctrl)
115 unsigned long cmd_timeout = ctrl->cmd_started + duration;
123 if (NO_CMD_CMPL(ctrl))
126 if (!ctrl->cmd_busy)
139 if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE &&
140 ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE)
141 rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout);
143 rc = pcie_poll_cmd(ctrl, jiffies_to_msecs(timeout));
146 ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n",
147 ctrl->slot_ctrl,
148 jiffies_to_msecs(jiffies - ctrl->cmd_started));
156 static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd,
159 struct pci_dev *pdev = ctrl_dev(ctrl);
162 mutex_lock(&ctrl->ctrl_lock);
167 pcie_wait_cmd(ctrl);
171 ctrl_info(ctrl, "%s: no response from device\n", __func__);
178 ctrl->cmd_busy = 1;
180 ctrl->slot_ctrl = slot_ctrl;
182 ctrl->cmd_started = jiffies;
193 ctrl->cmd_busy = 0;
200 pcie_wait_cmd(ctrl);
203 mutex_unlock(&ctrl->ctrl_lock);
208 * @ctrl: controller to which the command is issued
212 static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
214 pcie_do_write_cmd(ctrl, cmd, mask, true);
218 static void pcie_write_cmd_nowait(struct controller *ctrl, u16 cmd, u16 mask)
220 pcie_do_write_cmd(ctrl, cmd, mask, false);
225 * @ctrl: PCIe hotplug controller
234 int pciehp_check_link_active(struct controller *ctrl)
236 struct pci_dev *pdev = ctrl_dev(ctrl);
245 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status);
290 int pciehp_check_link_status(struct controller *ctrl)
292 struct pci_dev *pdev = ctrl_dev(ctrl);
297 ctrl_info(ctrl, "Slot(%s): No link\n", slot_name(ctrl));
301 if (ctrl->inband_presence_disabled)
304 found = pci_bus_check_dev(ctrl->pcie->port->subordinate,
310 &ctrl->pending_events);
313 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status);
316 ctrl_info(ctrl, "Slot(%s): Cannot train link: status %#06x\n",
317 slot_name(ctrl), lnk_status);
321 pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);
324 ctrl_info(ctrl, "Slot(%s): No device found\n",
325 slot_name(ctrl));
332 static int __pciehp_link_set(struct controller *ctrl, bool enable)
334 struct pci_dev *pdev = ctrl_dev(ctrl);
343 static int pciehp_link_enable(struct controller *ctrl)
345 return __pciehp_link_set(ctrl, true);
351 struct controller *ctrl = to_ctrl(hotplug_slot);
352 struct pci_dev *pdev = ctrl_dev(ctrl);
364 struct controller *ctrl = to_ctrl(hotplug_slot);
365 struct pci_dev *pdev = ctrl_dev(ctrl);
371 ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__,
372 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
392 void pciehp_get_power_status(struct controller *ctrl, u8 *status)
394 struct pci_dev *pdev = ctrl_dev(ctrl);
398 ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__,
399 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
414 void pciehp_get_latch_status(struct controller *ctrl, u8 *status)
416 struct pci_dev *pdev = ctrl_dev(ctrl);
425 * @ctrl: PCIe hotplug controller
435 int pciehp_card_present(struct controller *ctrl)
437 struct pci_dev *pdev = ctrl_dev(ctrl);
450 * @ctrl: PCIe hotplug controller
460 int pciehp_card_present_or_link_active(struct controller *ctrl)
464 ret = pciehp_card_present(ctrl);
468 return pciehp_check_link_active(ctrl);
471 int pciehp_query_power_fault(struct controller *ctrl)
473 struct pci_dev *pdev = ctrl_dev(ctrl);
483 struct controller *ctrl = to_ctrl(hotplug_slot);
484 struct pci_dev *pdev = ctrl_dev(ctrl);
487 pcie_write_cmd_nowait(ctrl, status << 6,
495 * @ctrl: PCIe hotplug controller
508 void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn)
512 if (PWR_LED(ctrl) && pwr != INDICATOR_NOOP) {
517 if (ATTN_LED(ctrl) && attn != INDICATOR_NOOP) {
523 pcie_write_cmd_nowait(ctrl, cmd, mask);
524 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
525 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd);
529 int pciehp_power_on_slot(struct controller *ctrl)
531 struct pci_dev *pdev = ctrl_dev(ctrl);
540 ctrl->power_fault_detected = 0;
542 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_ON, PCI_EXP_SLTCTL_PCC);
543 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
544 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
547 retval = pciehp_link_enable(ctrl);
549 ctrl_err(ctrl, "%s: Can not enable the link!\n", __func__);
554 void pciehp_power_off_slot(struct controller *ctrl)
556 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC);
557 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
558 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
562 static void pciehp_ignore_dpc_link_change(struct controller *ctrl,
570 atomic_and(~PCI_EXP_SLTSTA_DLLSC, &ctrl->pending_events);
574 ctrl_info(ctrl, "Slot(%s): Link Down/Up ignored (recovered by DPC)\n",
575 slot_name(ctrl));
582 down_read_nested(&ctrl->reset_lock, ctrl->depth);
583 if (!pciehp_check_link_active(ctrl))
584 pciehp_request(ctrl, PCI_EXP_SLTSTA_DLLSC);
585 up_read(&ctrl->reset_lock);
590 struct controller *ctrl = (struct controller *)dev_id;
591 struct pci_dev *pdev = ctrl_dev(ctrl);
600 (!(ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE) && !pciehp_poll_mode))
613 atomic_or(RERUN_ISR, &ctrl->pending_events);
621 ctrl_info(ctrl, "%s: no response from device\n", __func__);
639 if (ctrl->power_fault_detected)
642 ctrl->power_fault_detected = true;
664 ctrl_dbg(ctrl, "pending interrupts %#06x from Slot Status\n", events);
673 ctrl->cmd_busy = 0;
675 wake_up(&ctrl->queue);
684 ctrl_dbg(ctrl, "ignoring hotplug event %#06x\n", events);
689 atomic_or(events, &ctrl->pending_events);
695 struct controller *ctrl = (struct controller *)dev_id;
696 struct pci_dev *pdev = ctrl_dev(ctrl);
700 ctrl->ist_running = true;
704 if (atomic_fetch_and(~RERUN_ISR, &ctrl->pending_events) & RERUN_ISR) {
712 events = atomic_xchg(&ctrl->pending_events, 0);
720 pciehp_handle_button_press(ctrl);
724 ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(ctrl));
725 pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
734 ctrl->state == ON_STATE) {
736 pciehp_ignore_dpc_link_change(ctrl, pdev, irq);
743 down_read_nested(&ctrl->reset_lock, ctrl->depth);
745 pciehp_handle_disable_request(ctrl);
747 pciehp_handle_presence_or_link_change(ctrl, events);
748 up_read(&ctrl->reset_lock);
753 ctrl->ist_running = false;
754 wake_up(&ctrl->requester);
760 struct controller *ctrl = data;
766 while (pciehp_isr(IRQ_NOTCONNECTED, ctrl) == IRQ_WAKE_THREAD ||
767 atomic_read(&ctrl->pending_events))
768 pciehp_ist(IRQ_NOTCONNECTED, ctrl);
779 static void pcie_enable_notification(struct controller *ctrl)
800 if (ATTN_BUTTN(ctrl))
806 if (!pciehp_poll_mode && !NO_CMD_CMPL(ctrl))
814 pcie_write_cmd_nowait(ctrl, cmd, mask);
815 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
816 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd);
819 static void pcie_disable_notification(struct controller *ctrl)
827 pcie_write_cmd(ctrl, 0, mask);
828 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
829 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0);
832 void pcie_clear_hotplug_events(struct controller *ctrl)
834 pcie_capability_write_word(ctrl_dev(ctrl), PCI_EXP_SLTSTA,
838 void pcie_enable_interrupt(struct controller *ctrl)
843 pcie_write_cmd(ctrl, mask, mask);
846 void pcie_disable_interrupt(struct controller *ctrl)
858 pcie_write_cmd(ctrl, 0, mask);
873 struct controller *ctrl = get_service_data(dev);
875 if (ctrl->state != ON_STATE)
881 if (!pciehp_check_link_active(ctrl))
882 pciehp_request(ctrl, PCI_EXP_SLTSTA_DLLSC);
897 struct controller *ctrl = to_ctrl(hotplug_slot);
898 struct pci_dev *pdev = ctrl_dev(ctrl);
905 down_write_nested(&ctrl->reset_lock, ctrl->depth);
907 if (!ATTN_BUTTN(ctrl)) {
914 pcie_write_cmd(ctrl, 0, ctrl_mask);
915 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
916 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0);
918 rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port);
921 pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask);
922 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
923 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask);
925 up_write(&ctrl->reset_lock);
929 int pcie_init_notification(struct controller *ctrl)
931 if (pciehp_request_irq(ctrl))
933 pcie_enable_notification(ctrl);
934 ctrl->notification_enabled = 1;
938 void pcie_shutdown_notification(struct controller *ctrl)
940 if (ctrl->notification_enabled) {
941 pcie_disable_notification(ctrl);
942 pciehp_free_irq(ctrl);
943 ctrl->notification_enabled = 0;
947 static inline void dbg_ctrl(struct controller *ctrl)
949 struct pci_dev *pdev = ctrl->pcie->port;
952 ctrl_dbg(ctrl, "Slot Capabilities : 0x%08x\n", ctrl->slot_cap);
954 ctrl_dbg(ctrl, "Slot Status : 0x%04x\n", reg16);
956 ctrl_dbg(ctrl, "Slot Control : 0x%04x\n", reg16);
977 struct controller *ctrl;
983 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
984 if (!ctrl)
987 ctrl->pcie = dev;
988 ctrl->depth = pcie_hotplug_depth(dev->port);
1001 ctrl->slot_cap = slot_cap;
1002 mutex_init(&ctrl->ctrl_lock);
1003 mutex_init(&ctrl->state_lock);
1004 init_rwsem(&ctrl->reset_lock);
1005 init_waitqueue_head(&ctrl->requester);
1006 init_waitqueue_head(&ctrl->queue);
1007 INIT_DELAYED_WORK(&ctrl->button_work, pciehp_queue_pushbutton_work);
1008 dbg_ctrl(ctrl);
1011 ctrl->state = list_empty(&subordinate->devices) ? OFF_STATE : ON_STATE;
1016 pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_IBPD_DISABLE,
1018 ctrl->inband_presence_disabled = 1;
1022 ctrl->inband_presence_disabled = 1;
1030 ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c IbPresDis%c LLActRep%c%s\n",
1049 if (POWER_CTRL(ctrl)) {
1050 pciehp_get_power_status(ctrl, &poweron);
1051 if (!pciehp_card_present_or_link_active(ctrl) && poweron) {
1052 pcie_disable_notification(ctrl);
1053 pciehp_power_off_slot(ctrl);
1057 return ctrl;
1060 void pciehp_release_ctrl(struct controller *ctrl)
1062 cancel_delayed_work_sync(&ctrl->button_work);
1063 kfree(ctrl);