Lines Matching refs:cpm_base
121 * @cpm_base: CPM System Level Control and Status Register(SLCR) Base
133 void __iomem *cpm_base;
307 val = readl_relaxed(port->cpm_base + XILINX_CPM_PCIE_IR_STATUS);
309 writel_relaxed(val, port->cpm_base +
317 val = readl_relaxed(port->cpm_base + XILINX_CPM_PCIE_MISC_IR_STATUS);
320 port->cpm_base + XILINX_CPM_PCIE_MISC_IR_STATUS);
511 port->cpm_base + XILINX_CPM_PCIE_MISC_IR_ENABLE);
515 port->cpm_base + XILINX_CPM_PCIE_IR_ENABLE);
538 port->cpm_base = devm_platform_ioremap_resource_byname(pdev,
540 if (IS_ERR(port->cpm_base))
541 return PTR_ERR(port->cpm_base);