Lines Matching refs:rockchip_pcie_write
56 rockchip_pcie_write(rockchip, 0,
58 rockchip_pcie_write(rockchip, 0,
60 rockchip_pcie_write(rockchip, 0,
62 rockchip_pcie_write(rockchip, 0,
82 rockchip_pcie_write(rockchip, addr0,
84 rockchip_pcie_write(rockchip, addr1,
86 rockchip_pcie_write(rockchip, desc0,
88 rockchip_pcie_write(rockchip, 0,
104 rockchip_pcie_write(rockchip, vid_regs,
110 rockchip_pcie_write(rockchip, reg, PCIE_EP_CONFIG_DID_VID);
112 rockchip_pcie_write(rockchip,
118 rockchip_pcie_write(rockchip, hdr->cache_line_size,
121 rockchip_pcie_write(rockchip, hdr->subsys_id << 16,
124 rockchip_pcie_write(rockchip, hdr->interrupt_pin << 8,
190 rockchip_pcie_write(rockchip, cfg, reg);
191 rockchip_pcie_write(rockchip, addr0,
193 rockchip_pcie_write(rockchip, addr1,
221 rockchip_pcie_write(rockchip, cfg, reg);
222 rockchip_pcie_write(rockchip, 0x0,
224 rockchip_pcie_write(rockchip, 0x0,
284 rockchip_pcie_write(rockchip, flags,
315 rockchip_pcie_write(rockchip,
321 rockchip_pcie_write(rockchip,
436 rockchip_pcie_write(rockchip, cfg, PCIE_CORE_PHY_FUNC_CFG);
543 rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
556 rockchip_pcie_write(rockchip, BIT(0), PCIE_CORE_PHY_FUNC_CFG);
607 rockchip_pcie_write(rockchip, cfg_msi,
610 rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE,