Lines Matching refs:rockchip
20 #include "pcie-rockchip.h"
24 * @rockchip: Rockchip PCIe controller
41 struct rockchip_pcie rockchip;
53 static void rockchip_pcie_clear_ep_ob_atu(struct rockchip_pcie *rockchip,
56 rockchip_pcie_write(rockchip, 0,
58 rockchip_pcie_write(rockchip, 0,
60 rockchip_pcie_write(rockchip, 0,
62 rockchip_pcie_write(rockchip, 0,
66 static void rockchip_pcie_prog_ep_ob_atu(struct rockchip_pcie *rockchip, u8 fn,
82 rockchip_pcie_write(rockchip, addr0,
84 rockchip_pcie_write(rockchip, addr1,
86 rockchip_pcie_write(rockchip, desc0,
88 rockchip_pcie_write(rockchip, 0,
97 struct rockchip_pcie *rockchip = &ep->rockchip;
104 rockchip_pcie_write(rockchip, vid_regs,
108 reg = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_DID_VID);
110 rockchip_pcie_write(rockchip, reg, PCIE_EP_CONFIG_DID_VID);
112 rockchip_pcie_write(rockchip,
118 rockchip_pcie_write(rockchip, hdr->cache_line_size,
121 rockchip_pcie_write(rockchip, hdr->subsys_id << 16,
124 rockchip_pcie_write(rockchip, hdr->interrupt_pin << 8,
135 struct rockchip_pcie *rockchip = &ep->rockchip;
184 cfg = rockchip_pcie_read(rockchip, reg);
190 rockchip_pcie_write(rockchip, cfg, reg);
191 rockchip_pcie_write(rockchip, addr0,
193 rockchip_pcie_write(rockchip, addr1,
203 struct rockchip_pcie *rockchip = &ep->rockchip;
216 cfg = rockchip_pcie_read(rockchip, reg);
221 rockchip_pcie_write(rockchip, cfg, reg);
222 rockchip_pcie_write(rockchip, 0x0,
224 rockchip_pcie_write(rockchip, 0x0,
238 struct rockchip_pcie *pcie = &ep->rockchip;
253 struct rockchip_pcie *rockchip = &ep->rockchip;
263 rockchip_pcie_clear_ep_ob_atu(rockchip, r);
273 struct rockchip_pcie *rockchip = &ep->rockchip;
276 flags = rockchip_pcie_read(rockchip,
284 rockchip_pcie_write(rockchip, flags,
293 struct rockchip_pcie *rockchip = &ep->rockchip;
296 flags = rockchip_pcie_read(rockchip,
309 struct rockchip_pcie *rockchip = &ep->rockchip;
315 rockchip_pcie_write(rockchip,
321 rockchip_pcie_write(rockchip,
333 cmd = rockchip_pcie_read(&ep->rockchip,
354 struct rockchip_pcie *rockchip = &ep->rockchip;
361 flags = rockchip_pcie_read(&ep->rockchip,
376 data = rockchip_pcie_read(rockchip,
383 pci_addr = rockchip_pcie_read(rockchip,
388 pci_addr |= rockchip_pcie_read(rockchip,
397 rockchip_pcie_prog_ep_ob_atu(rockchip, fn, r,
428 struct rockchip_pcie *rockchip = &ep->rockchip;
436 rockchip_pcie_write(rockchip, cfg, PCIE_CORE_PHY_FUNC_CFG);
467 static int rockchip_pcie_parse_ep_dt(struct rockchip_pcie *rockchip,
470 struct device *dev = rockchip->dev;
473 err = rockchip_pcie_parse_dt(rockchip);
477 err = rockchip_pcie_get_phys(rockchip);
482 "rockchip,max-outbound-regions",
498 { .compatible = "rockchip,rk3399-pcie-ep"},
506 struct rockchip_pcie *rockchip;
517 rockchip = &ep->rockchip;
518 rockchip->is_rc = false;
519 rockchip->dev = dev;
530 err = rockchip_pcie_parse_ep_dt(rockchip, ep);
534 err = rockchip_pcie_enable_clocks(rockchip);
538 err = rockchip_pcie_init_port(rockchip);
543 rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
556 rockchip_pcie_write(rockchip, BIT(0), PCIE_CORE_PHY_FUNC_CFG);
565 windows[i].phys_base = rockchip->mem_res->start + (SZ_1M * i);
596 cfg_msi = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE +
601 cfg_msix_cp = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE +
607 rockchip_pcie_write(rockchip, cfg_msi,
610 rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE,
617 rockchip_pcie_deinit_phys(rockchip);
619 rockchip_pcie_disable_clocks(rockchip);
625 .name = "rockchip-pcie-ep",