Lines Matching defs:pcie
7 * arch/sh/drivers/pci/pcie-sh7786.c
33 #include "pcie-rcar.h"
46 struct rcar_pcie pcie;
94 static u32 rcar_read_conf(struct rcar_pcie *pcie, int where)
97 u32 val = rcar_pci_read_reg(pcie, where & ~3);
119 static int rcar_pci_write_reg_workaround(struct rcar_pcie *pcie, u32 val,
126 : "+r"(error):"r"(val), "r"(pcie->base + reg) : "memory");
128 rcar_pci_write_reg(pcie, val, reg);
133 static int rcar_pci_read_reg_workaround(struct rcar_pcie *pcie, u32 *val,
140 : "+r"(error), "=r"(*val) : "r"(pcie->base + reg) : "memory");
145 *val = rcar_pci_read_reg(pcie, reg);
155 struct rcar_pcie *pcie = &host->pcie;
160 ret = rcar_pcie_wakeup(pcie->dev, pcie->base);
191 *data = rcar_pci_read_reg(pcie, PCICONF(index));
193 rcar_pci_write_reg(pcie, *data, PCICONF(index));
199 rcar_pci_write_reg(pcie, rcar_pci_read_reg(pcie, PCIEERRFR), PCIEERRFR);
202 rcar_pci_write_reg(pcie, PCIE_CONF_BUS(bus->number) |
207 rcar_pci_write_reg(pcie, PCIECCTLR_CCIE | TYPE0, PCIECCTLR);
209 rcar_pci_write_reg(pcie, PCIECCTLR_CCIE | TYPE1, PCIECCTLR);
212 if (rcar_pci_read_reg(pcie, PCIEERRFR) & UNSUPPORTED_REQUEST)
216 if (rcar_read_conf(pcie, RCONF(PCI_STATUS)) &
221 ret = rcar_pci_read_reg_workaround(pcie, data, PCIECDR);
223 ret = rcar_pci_write_reg_workaround(pcie, *data, PCIECDR);
226 rcar_pci_write_reg(pcie, 0, PCIECCTLR);
247 dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n",
267 dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n",
292 static void rcar_pcie_force_speedup(struct rcar_pcie *pcie)
294 struct device *dev = pcie->dev;
298 if ((rcar_pci_read_reg(pcie, MACS2R) & LINK_SPEED) != LINK_SPEED_5_0GTS)
301 if (rcar_pci_read_reg(pcie, MACCTLR) & SPEED_CHANGE) {
306 macsr = rcar_pci_read_reg(pcie, MACSR);
311 rcar_rmw32(pcie, EXPCAP(12), PCI_EXP_LNKSTA_CLS,
315 rcar_rmw32(pcie, MACCGSPSETR, SPCNGRSN, 0);
319 rcar_pci_write_reg(pcie, macsr, MACSR);
322 rcar_rmw32(pcie, MACCTLR, SPEED_CHANGE, SPEED_CHANGE);
325 macsr = rcar_pci_read_reg(pcie, MACSR);
328 rcar_pci_write_reg(pcie, macsr, MACSR);
348 struct rcar_pcie *pcie = &host->pcie;
355 rcar_pcie_force_speedup(pcie);
367 rcar_pcie_set_outbound(pcie, i, win);
388 static int phy_wait_for_ack(struct rcar_pcie *pcie)
390 struct device *dev = pcie->dev;
394 if (rcar_pci_read_reg(pcie, H1_PCIEPHYADRR) & PHY_ACK)
405 static void phy_write_reg(struct rcar_pcie *pcie,
417 rcar_pci_write_reg(pcie, data, H1_PCIEPHYDOUTR);
418 rcar_pci_write_reg(pcie, phyaddr, H1_PCIEPHYADRR);
421 phy_wait_for_ack(pcie);
424 rcar_pci_write_reg(pcie, 0, H1_PCIEPHYDOUTR);
425 rcar_pci_write_reg(pcie, 0, H1_PCIEPHYADRR);
428 phy_wait_for_ack(pcie);
431 static int rcar_pcie_hw_init(struct rcar_pcie *pcie)
436 rcar_pci_write_reg(pcie, 0, PCIETCTLR);
439 rcar_pci_write_reg(pcie, 1, PCIEMSR);
441 err = rcar_pcie_wait_for_phyrdy(pcie);
450 rcar_pci_write_reg(pcie, PCI_CLASS_BRIDGE_PCI_NORMAL << 8, IDSETR1);
456 rcar_rmw32(pcie, RCONF(PCI_SECONDARY_BUS), 0xff, 1);
457 rcar_rmw32(pcie, RCONF(PCI_SUBORDINATE_BUS), 0xff, 1);
460 rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP);
461 rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS),
463 rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f,
467 rcar_rmw32(pcie, REXPCAP(PCI_EXP_LNKCAP), PCI_EXP_LNKCAP_DLLLARC,
471 rcar_rmw32(pcie, REXPCAP(PCI_EXP_SLTCAP), PCI_EXP_SLTCAP_PSN, 0);
474 rcar_rmw32(pcie, TLCTLR + 1, 0x3f, 50);
477 rcar_rmw32(pcie, RVCCAP(0), 0xfff00000, 0);
481 rcar_pci_write_reg(pcie, 0x801f0000, PCIEMSITXR);
483 rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR);
486 rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR);
489 err = rcar_pcie_wait_for_dl(pcie);
494 rcar_rmw32(pcie, PCIEINTXR, 0, 0xF << 8);
503 struct rcar_pcie *pcie = &host->pcie;
506 phy_write_reg(pcie, 0, 0x42, 0x1, 0x0EC34191);
507 phy_write_reg(pcie, 1, 0x42, 0x1, 0x0EC34180);
508 phy_write_reg(pcie, 0, 0x43, 0x1, 0x00210188);
509 phy_write_reg(pcie, 1, 0x43, 0x1, 0x00210188);
510 phy_write_reg(pcie, 0, 0x44, 0x1, 0x015C0014);
511 phy_write_reg(pcie, 1, 0x44, 0x1, 0x015C0014);
512 phy_write_reg(pcie, 1, 0x4C, 0x1, 0x786174A0);
513 phy_write_reg(pcie, 1, 0x4D, 0x1, 0x048000BB);
514 phy_write_reg(pcie, 0, 0x51, 0x1, 0x079EC062);
515 phy_write_reg(pcie, 0, 0x52, 0x1, 0x20000000);
516 phy_write_reg(pcie, 1, 0x52, 0x1, 0x20000000);
517 phy_write_reg(pcie, 1, 0x56, 0x1, 0x00003806);
519 phy_write_reg(pcie, 0, 0x60, 0x1, 0x004B03A5);
520 phy_write_reg(pcie, 0, 0x64, 0x1, 0x3F0F1F0F);
521 phy_write_reg(pcie, 0, 0x66, 0x1, 0x00008000);
528 struct rcar_pcie *pcie = &host->pcie;
534 rcar_pci_write_reg(pcie, 0x000f0030, GEN2_PCIEPHYADDR);
535 rcar_pci_write_reg(pcie, 0x00381203, GEN2_PCIEPHYDATA);
536 rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL);
537 rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL);
539 rcar_pci_write_reg(pcie, 0x000f0054, GEN2_PCIEPHYADDR);
541 rcar_pci_write_reg(pcie, 0x13802007, GEN2_PCIEPHYDATA);
542 rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL);
543 rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL);
566 struct rcar_pcie *pcie = &host->pcie;
568 struct device *dev = pcie->dev;
571 reg = rcar_pci_read_reg(pcie, PCIEMSIFR);
585 rcar_pci_write_reg(pcie, BIT(index), PCIEMSIFR);
589 reg = rcar_pci_read_reg(pcie, PCIEMSIFR);
622 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
625 rcar_pci_write_reg(pcie, BIT(d->hwirq), PCIEMSIFR);
631 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
636 value = rcar_pci_read_reg(pcie, PCIEMSIIER);
638 rcar_pci_write_reg(pcie, value, PCIEMSIIER);
645 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
650 value = rcar_pci_read_reg(pcie, PCIEMSIIER);
652 rcar_pci_write_reg(pcie, value, PCIEMSIIER);
664 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
666 msg->address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE;
667 msg->address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR);
730 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
731 struct fwnode_handle *fwnode = dev_fwnode(pcie->dev);
737 dev_err(pcie->dev, "failed to create IRQ domain\n");
744 dev_err(pcie->dev, "failed to create MSI domain\n");
762 struct rcar_pcie *pcie = &host->pcie;
763 struct device *dev = pcie->dev;
797 rcar_pci_write_reg(pcie, 0, PCIEMSIIER);
803 rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR);
804 rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR);
815 struct rcar_pcie *pcie = &host->pcie;
818 rcar_pci_write_reg(pcie, 0, PCIEMSIIER);
821 rcar_pci_write_reg(pcie, 0, PCIEMSIALR);
828 struct rcar_pcie *pcie = &host->pcie;
829 struct device *dev = pcie->dev;
833 host->phy = devm_phy_optional_get(dev, "pcie");
841 pcie->base = devm_ioremap_resource(dev, &res);
842 if (IS_ERR(pcie->base))
843 return PTR_ERR(pcie->base);
847 dev_err(dev, "cannot get pcie bus clock\n");
875 static int rcar_pcie_inbound_ranges(struct rcar_pcie *pcie,
893 dev_err(pcie->dev, "Failed to map inbound regions!\n");
913 rcar_pcie_set_inbound(pcie, cpu_addr, pci_addr,
932 err = rcar_pcie_inbound_ranges(&host->pcie, entry, &index);
941 { .compatible = "renesas,pcie-r8a7779",
943 { .compatible = "renesas,pcie-r8a7790",
945 { .compatible = "renesas,pcie-r8a7791",
947 { .compatible = "renesas,pcie-rcar-gen2",
949 { .compatible = "renesas,pcie-r8a7795",
951 { .compatible = "renesas,pcie-rcar-gen3",
960 struct rcar_pcie *pcie;
970 pcie = &host->pcie;
971 pcie->dev = dev;
974 pm_runtime_enable(pcie->dev);
975 err = pm_runtime_get_sync(pcie->dev);
977 dev_err(pcie->dev, "pm_runtime_get_sync failed\n");
1005 if (rcar_pcie_hw_init(pcie)) {
1011 data = rcar_pci_read_reg(pcie, MACSR);
1057 struct rcar_pcie *pcie = &host->pcie;
1072 data = rcar_pci_read_reg(pcie, MACSR);
1081 rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR);
1082 rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR);
1085 rcar_pci_write_reg(pcie, val, PCIEMSIIER);
1096 struct rcar_pcie *pcie = &host->pcie;
1098 if (rcar_pci_read_reg(pcie, PMSR) &&
1099 !(rcar_pci_read_reg(pcie, PCIETCTLR) & DL_DOWN))
1103 rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR);
1104 rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR);
1105 return rcar_pcie_wait_for_dl(pcie);
1115 .name = "rcar-pcie",
1131 { .compatible = "renesas,pcie-r8a7779" },
1132 { .compatible = "renesas,pcie-r8a7790" },
1133 { .compatible = "renesas,pcie-r8a7791" },
1134 { .compatible = "renesas,pcie-rcar-gen2" },