Lines Matching defs:data
153 unsigned int devfn, int where, u32 *data)
162 PCI_SET_ERROR_RESPONSE(data);
191 *data = rcar_pci_read_reg(pcie, PCICONF(index));
193 rcar_pci_write_reg(pcie, *data, PCICONF(index));
221 ret = rcar_pci_read_reg_workaround(pcie, data, PCIECDR);
223 ret = rcar_pci_write_reg_workaround(pcie, *data, PCIECDR);
259 u32 data;
263 bus, devfn, where, &data);
272 data &= ~(0xff << shift);
273 data |= ((val & 0xff) << shift);
276 data &= ~(0xffff << shift);
277 data |= ((val & 0xffff) << shift);
279 data = val;
282 bus, devfn, where, &data);
407 unsigned int lane, u32 data)
416 /* Set write data */
417 rcar_pci_write_reg(pcie, data, H1_PCIEPHYDOUTR);
420 /* Ignore errors as they will be dealt with if the data link is down */
427 /* Ignore errors as they will be dealt with if the data link is down */
466 /* Enable data link layer active state reporting */
563 static irqreturn_t rcar_pcie_msi_irq(int irq, void *data)
565 struct rcar_pcie_host *host = data;
661 static void rcar_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
663 struct rcar_msi *msi = irq_data_get_irq_chip_data(data);
668 msg->data = data->hwirq;
800 * Setup MSI data target using RC base address address, which
942 .data = rcar_pcie_phy_init_h1 },
944 .data = rcar_pcie_phy_init_gen2 },
946 .data = rcar_pcie_phy_init_gen2 },
948 .data = rcar_pcie_phy_init_gen2 },
950 .data = rcar_pcie_phy_init_gen3 },
952 .data = rcar_pcie_phy_init_gen3 },
961 u32 data;
1011 data = rcar_pci_read_reg(pcie, MACSR);
1012 dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f);
1058 unsigned int data;
1072 data = rcar_pci_read_reg(pcie, MACSR);
1073 dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f);