Lines Matching refs:port
6 * the driver mostly deals MSI mapping and handling of per-port
43 #define CORE_LANE_CFG(port) (0x84000 + 0x4000 * (port))
49 #define CORE_LANE_CTL(port) (0x84004 + 0x4000 * (port))
263 struct apple_pcie_port *port = irq_data_get_irq_chip_data(data);
265 writel_relaxed(BIT(data->hwirq), port->base + PORT_INTMSKSET);
270 struct apple_pcie_port *port = irq_data_get_irq_chip_data(data);
272 writel_relaxed(BIT(data->hwirq), port->base + PORT_INTMSKCLR);
282 struct apple_pcie_port *port = irq_data_get_irq_chip_data(data);
285 writel_relaxed(BIT(data->hwirq), port->base + PORT_INTSTAT);
314 struct apple_pcie_port *port = domain->host_data;
328 &apple_port_irqchip, port, flow,
358 struct apple_pcie_port *port = irq_desc_get_handler_data(desc);
365 stat = readl_relaxed(port->base + PORT_INTSTAT);
368 generic_handle_domain_irq(port->domain, i);
373 static int apple_pcie_port_setup_irq(struct apple_pcie_port *port)
375 struct fwnode_handle *fwnode = &port->np->fwnode;
378 /* FIXME: consider moving each interrupt under each port */
379 irq = irq_of_parse_and_map(to_of_node(dev_fwnode(port->pcie->dev)),
380 port->idx);
384 port->domain = irq_domain_create_linear(fwnode, 32,
386 port);
387 if (!port->domain)
391 writel_relaxed(~0, port->base + PORT_INTMSKSET);
392 writel_relaxed(~0, port->base + PORT_INTSTAT);
394 irq_set_chained_handler_and_data(irq, apple_port_irq_handler, port);
398 writel_relaxed(lower_32_bits(DOORBELL_ADDR), port->base + PORT_MSIADDR);
401 writel_relaxed(0, port->base + PORT_MSIBASE);
402 writel_relaxed((ilog2(port->pcie->nvecs) << PORT_MSICFG_L2MSINUM_SHIFT) |
403 PORT_MSICFG_EN, port->base + PORT_MSICFG);
410 struct apple_pcie_port *port = data;
411 unsigned int hwirq = irq_domain_get_irq_data(port->domain, irq)->hwirq;
415 dev_info_ratelimited(port->pcie->dev, "Link up on %pOF\n",
416 port->np);
417 complete_all(&port->pcie->event);
420 dev_info_ratelimited(port->pcie->dev, "Link down on %pOF\n",
421 port->np);
430 static int apple_pcie_port_register_irqs(struct apple_pcie_port *port)
443 .fwnode = &port->np->fwnode,
452 irq = irq_domain_alloc_irqs(port->domain, 1, NUMA_NO_NODE,
458 port_irqs[i].name, port);
466 struct apple_pcie_port *port)
477 rmw_set(CORE_LANE_CTL_CFGACC, pcie->base + CORE_LANE_CTL(port->idx));
478 rmw_set(CORE_LANE_CFG_REFCLK0REQ, pcie->base + CORE_LANE_CFG(port->idx));
480 res = readl_relaxed_poll_timeout(pcie->base + CORE_LANE_CFG(port->idx),
486 rmw_set(CORE_LANE_CFG_REFCLK1REQ, pcie->base + CORE_LANE_CFG(port->idx));
487 res = readl_relaxed_poll_timeout(pcie->base + CORE_LANE_CFG(port->idx),
494 rmw_clear(CORE_LANE_CTL_CFGACC, pcie->base + CORE_LANE_CTL(port->idx));
496 rmw_set(CORE_LANE_CFG_REFCLKEN, pcie->base + CORE_LANE_CFG(port->idx));
497 rmw_set(PORT_REFCLK_EN, port->base + PORT_REFCLK);
502 static u32 apple_pcie_rid2sid_write(struct apple_pcie_port *port,
505 writel_relaxed(val, port->base + PORT_RID2SID(idx));
507 return readl_relaxed(port->base + PORT_RID2SID(idx));
514 struct apple_pcie_port *port;
524 port = devm_kzalloc(pcie->dev, sizeof(*port), GFP_KERNEL);
525 if (!port)
532 /* Use the first reg entry to work out the port index */
533 port->idx = idx >> 11;
534 port->pcie = pcie;
535 port->np = np;
537 port->base = devm_platform_ioremap_resource(platform, port->idx + 2);
538 if (IS_ERR(port->base))
539 return PTR_ERR(port->base);
541 rmw_set(PORT_APPCLK_EN, port->base + PORT_APPCLK);
546 ret = apple_pcie_setup_refclk(pcie, port);
554 rmw_set(PORT_PERST_OFF, port->base + PORT_PERST);
560 ret = readl_relaxed_poll_timeout(port->base + PORT_STATUS, stat,
563 dev_err(pcie->dev, "port %pOF ready wait timeout\n", np);
567 rmw_clear(PORT_REFCLK_CGDIS, port->base + PORT_REFCLK);
568 rmw_clear(PORT_APPCLK_CGDIS, port->base + PORT_APPCLK);
570 ret = apple_pcie_port_setup_irq(port);
576 if (apple_pcie_rid2sid_write(port, i, 0xbad1d) != 0xbad1d)
578 apple_pcie_rid2sid_write(port, i, 0);
583 port->sid_map_sz = i;
585 list_add_tail(&port->entry, &pcie->ports);
588 ret = apple_pcie_port_register_irqs(port);
591 writel_relaxed(PORT_LTSSMCTL_START, port->base + PORT_LTSSMCTL);
653 struct apple_pcie_port *port;
655 /* Find the root port this device is on */
658 /* If finding the port itself, nothing to do */
662 list_for_each_entry(port, &pcie->ports, entry) {
663 if (port->idx == PCI_SLOT(port_pdev->devfn))
664 return port;
670 static int apple_pcie_add_device(struct apple_pcie_port *port,
677 pci_name(pdev->bus->self), port->idx);
679 err = of_map_id(port->pcie->dev->of_node, rid, "iommu-map",
684 mutex_lock(&port->pcie->lock);
686 idx = bitmap_find_free_region(port->sid_map, port->sid_map_sz, 0);
688 apple_pcie_rid2sid_write(port, idx,
696 mutex_unlock(&port->pcie->lock);
701 static void apple_pcie_release_device(struct apple_pcie_port *port,
707 mutex_lock(&port->pcie->lock);
709 for_each_set_bit(idx, port->sid_map, port->sid_map_sz) {
712 val = readl_relaxed(port->base + PORT_RID2SID(idx));
714 apple_pcie_rid2sid_write(port, idx, 0);
715 bitmap_release_region(port->sid_map, idx, 0);
721 mutex_unlock(&port->pcie->lock);
730 struct apple_pcie_port *port;
739 port = apple_pcie_get_port(pdev);
740 if (!port)
745 err = apple_pcie_add_device(port, pdev);
750 apple_pcie_release_device(port, pdev);