Lines Matching defs:resets
166 struct reset_control_bulk_data resets[QCOM_PCIE_2_1_0_MAX_RESETS];
190 struct reset_control_bulk_data resets[QCOM_PCIE_2_4_0_MAX_RESETS];
331 res->resets[0].id = "pci";
332 res->resets[1].id = "axi";
333 res->resets[2].id = "ahb";
334 res->resets[3].id = "por";
335 res->resets[4].id = "phy";
336 res->resets[5].id = "ext";
340 ret = devm_reset_control_bulk_get_exclusive(dev, res->num_resets, res->resets);
352 reset_control_bulk_assert(res->num_resets, res->resets);
367 ret = reset_control_bulk_assert(res->num_resets, res->resets);
369 dev_err(dev, "cannot assert resets\n");
379 ret = reset_control_bulk_deassert(res->num_resets, res->resets);
381 dev_err(dev, "cannot deassert resets\n");
398 /* enable PCIe clocks and resets */
605 /* enable PCIe clocks and resets */
651 res->resets[0].id = "axi_m";
652 res->resets[1].id = "axi_s";
653 res->resets[2].id = "axi_m_sticky";
654 res->resets[3].id = "pipe_sticky";
655 res->resets[4].id = "pwr";
656 res->resets[5].id = "ahb";
657 res->resets[6].id = "pipe";
658 res->resets[7].id = "axi_m_vmid";
659 res->resets[8].id = "axi_s_xpu";
660 res->resets[9].id = "parf";
661 res->resets[10].id = "phy";
662 res->resets[11].id = "phy_ahb";
666 ret = devm_reset_control_bulk_get_exclusive(dev, res->num_resets, res->resets);
677 reset_control_bulk_assert(res->num_resets, res->resets);
688 ret = reset_control_bulk_assert(res->num_resets, res->resets);
690 dev_err(dev, "cannot assert resets\n");
696 ret = reset_control_bulk_deassert(res->num_resets, res->resets);
698 dev_err(dev, "cannot deassert resets\n");
706 reset_control_bulk_assert(res->num_resets, res->resets);
761 dev_err(dev, "cannot assert resets\n");
769 dev_err(dev, "cannot deassert resets\n");
927 /* enable PCIe clocks and resets */