Lines Matching refs:parf
156 * @parf: Qualcomm PCIe specific PARF register base
178 void __iomem *parf;
402 val = readl_relaxed(pcie_ep->parf + PARF_BDF_TO_SID_CFG);
404 writel_relaxed(val, pcie_ep->parf + PARF_BDF_TO_SID_CFG);
407 val = readl_relaxed(pcie_ep->parf + PARF_DEBUG_INT_EN);
411 writel_relaxed(val, pcie_ep->parf + PARF_DEBUG_INT_EN);
414 writel_relaxed(PARF_DEVICE_TYPE_EP, pcie_ep->parf + PARF_DEVICE_TYPE);
417 val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
419 writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL);
422 val = readl_relaxed(pcie_ep->parf + PARF_AXI_MSTR_RD_HALT_NO_WRITES);
424 writel_relaxed(val, pcie_ep->parf + PARF_AXI_MSTR_RD_HALT_NO_WRITES);
427 val = readl_relaxed(pcie_ep->parf + PARF_AXI_MSTR_WR_ADDR_HALT);
429 writel_relaxed(val, pcie_ep->parf + PARF_AXI_MSTR_WR_ADDR_HALT);
432 val = readl_relaxed(pcie_ep->parf + PARF_Q2A_FLUSH);
434 writel_relaxed(val, pcie_ep->parf + PARF_Q2A_FLUSH);
442 val = readl_relaxed(pcie_ep->parf + PARF_SYS_CTRL);
447 writel_relaxed(val, pcie_ep->parf + PARF_SYS_CTRL);
450 val = readl_relaxed(pcie_ep->parf + PARF_DB_CTRL);
454 writel_relaxed(val, pcie_ep->parf + PARF_DB_CTRL);
457 val = readl_relaxed(pcie_ep->parf + PARF_CFG_BITS);
459 writel_relaxed(val, pcie_ep->parf + PARF_CFG_BITS);
479 writel_relaxed(0, pcie_ep->parf + PARF_INT_ALL_MASK);
483 writel_relaxed(val, pcie_ep->parf + PARF_INT_ALL_MASK);
496 pcie_ep->parf + PARF_MHI_BASE_ADDR_LOWER);
497 writel_relaxed(0, pcie_ep->parf + PARF_MHI_BASE_ADDR_UPPER);
500 val = readl_relaxed(pcie_ep->parf + PARF_MHI_CLOCK_RESET_CTRL);
502 writel_relaxed(val, pcie_ep->parf + PARF_MHI_CLOCK_RESET_CTRL);
507 val = readl_relaxed(pcie_ep->parf + PARF_LTSSM);
509 writel_relaxed(val, pcie_ep->parf + PARF_LTSSM);
550 pcie_ep->parf = devm_platform_ioremap_resource_byname(pdev, "parf");
551 if (IS_ERR(pcie_ep->parf))
552 return PTR_ERR(pcie_ep->parf);
651 u32 status = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_STATUS);
652 u32 mask = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_MASK);
655 writel_relaxed(status, pcie_ep->parf + PARF_INT_ALL_CLEAR);
669 val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
671 writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL);
677 val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
679 writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL);