Lines Matching defs:pci
19 #include "../../pci.h"
64 struct dw_pcie pci;
97 return dw_pcie_readl_dbi(&pcie->pci, ofs);
102 dw_pcie_writel_dbi(&pcie->pci, ofs, val);
108 pcie_update_bits(pcie->pci.dbi_base, ofs, mask, val);
125 u8 offset = dw_pcie_find_capability(&pcie->pci, PCI_CAP_ID_EXP);
133 static void intel_pcie_init_n_fts(struct dw_pcie *pci)
135 switch (pci->link_gen) {
137 pci->n_fts[1] = PORT_AFR_N_FTS_GEN3;
140 pci->n_fts[1] = PORT_AFR_N_FTS_GEN4;
143 pci->n_fts[1] = PORT_AFR_N_FTS_GEN12_DFT;
146 pci->n_fts[0] = PORT_AFR_N_FTS_GEN12_DFT;
151 struct device *dev = pcie->pci.dev;
209 struct dw_pcie *pci = &pcie->pci;
210 struct device *dev = pci->dev;
253 struct dw_pcie *pci = &pcie->pci;
255 if (pci->link_gen < 3)
267 dev_err(pcie->pci.dev, "PCIe link enter L2 timeout!\n");
274 if (dw_pcie_link_up(&pcie->pci))
285 struct dw_pcie *pci = &pcie->pci;
298 dev_err(pcie->pci.dev, "Core clock enable failed: %d\n", ret);
302 pci->atu_base = pci->dbi_base + 0xC0000;
306 intel_pcie_init_n_fts(pci);
308 ret = dw_pcie_setup_rc(&pci->pp);
312 dw_pcie_upconfig_setup(pci);
317 ret = dw_pcie_wait_for_link(pci);
348 struct dw_pcie_rp *pp = &pcie->pci.pp;
378 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
379 struct intel_pcie *pcie = dev_get_drvdata(pci->dev);
402 struct dw_pcie *pci;
410 pci = &pcie->pci;
411 pci->dev = dev;
412 pp = &pci->pp;
422 pci->ops = &intel_pcie_ops;