Lines Matching refs:rockchip
63 static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip,
66 return readl_relaxed(rockchip->apb_base + reg);
69 static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip,
72 writel_relaxed(val, rockchip->apb_base + reg);
78 struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc);
83 reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_LEGACY);
86 generic_handle_domain_irq(rockchip->irq_domain, hwirq);
125 static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip)
127 struct device *dev = rockchip->pci.dev;
136 rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX,
137 &intx_domain_ops, rockchip);
139 if (!rockchip->irq_domain) {
147 static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip)
149 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_ENABLE_LTSSM,
155 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
156 u32 val = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_LTSSM_STATUS);
167 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
170 gpiod_set_value_cansleep(rockchip->rst_gpio, 0);
172 rockchip_pcie_enable_ltssm(rockchip);
184 gpiod_set_value_cansleep(rockchip->rst_gpio, 1);
192 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
193 struct device *dev = rockchip->pci.dev;
201 ret = rockchip_pcie_init_irq_domain(rockchip);
206 rockchip);
209 rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
211 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_RC_MODE,
221 static int rockchip_pcie_clk_init(struct rockchip_pcie *rockchip)
223 struct device *dev = rockchip->pci.dev;
226 ret = devm_clk_bulk_get_all(dev, &rockchip->clks);
230 rockchip->clk_cnt = ret;
232 return clk_bulk_prepare_enable(rockchip->clk_cnt, rockchip->clks);
236 struct rockchip_pcie *rockchip)
238 rockchip->apb_base = devm_platform_ioremap_resource_byname(pdev, "apb");
239 if (IS_ERR(rockchip->apb_base))
240 return PTR_ERR(rockchip->apb_base);
242 rockchip->rst_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",
244 if (IS_ERR(rockchip->rst_gpio))
245 return PTR_ERR(rockchip->rst_gpio);
247 rockchip->rst = devm_reset_control_array_get_exclusive(&pdev->dev);
248 if (IS_ERR(rockchip->rst))
249 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst),
255 static int rockchip_pcie_phy_init(struct rockchip_pcie *rockchip)
257 struct device *dev = rockchip->pci.dev;
260 rockchip->phy = devm_phy_get(dev, "pcie-phy");
261 if (IS_ERR(rockchip->phy))
262 return dev_err_probe(dev, PTR_ERR(rockchip->phy),
265 ret = phy_init(rockchip->phy);
269 ret = phy_power_on(rockchip->phy);
271 phy_exit(rockchip->phy);
276 static void rockchip_pcie_phy_deinit(struct rockchip_pcie *rockchip)
278 phy_exit(rockchip->phy);
279 phy_power_off(rockchip->phy);
290 struct rockchip_pcie *rockchip;
294 rockchip = devm_kzalloc(dev, sizeof(*rockchip), GFP_KERNEL);
295 if (!rockchip)
298 platform_set_drvdata(pdev, rockchip);
300 rockchip->pci.dev = dev;
301 rockchip->pci.ops = &dw_pcie_ops;
303 pp = &rockchip->pci.pp;
306 ret = rockchip_pcie_resource_get(pdev, rockchip);
310 ret = reset_control_assert(rockchip->rst);
315 rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3");
316 if (IS_ERR(rockchip->vpcie3v3)) {
317 if (PTR_ERR(rockchip->vpcie3v3) != -ENODEV)
318 return dev_err_probe(dev, PTR_ERR(rockchip->vpcie3v3),
320 rockchip->vpcie3v3 = NULL;
322 ret = regulator_enable(rockchip->vpcie3v3);
329 ret = rockchip_pcie_phy_init(rockchip);
333 ret = reset_control_deassert(rockchip->rst);
337 ret = rockchip_pcie_clk_init(rockchip);
345 clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks);
347 rockchip_pcie_phy_deinit(rockchip);
349 if (rockchip->vpcie3v3)
350 regulator_disable(rockchip->vpcie3v3);
356 { .compatible = "rockchip,rk3568-pcie", },
362 .name = "rockchip-dw-pcie",