Lines Matching refs:addr
128 #define READ_U8(addr) __raw_readb(addr)
129 #define READ_U16(addr) __raw_readw(addr)
130 #define READ_U32(addr) __raw_readl(addr)
131 #define WRITE_U8(value, addr) __raw_writeb(value, addr)
132 #define WRITE_U16(value, addr) __raw_writew(value, addr)
133 #define WRITE_U32(value, addr) __raw_writel(value, addr)
135 #define READ_REG8(addr) readb(addr)
136 #define READ_REG16(addr) readw(addr)
137 #define READ_REG32(addr) readl(addr)
138 #define READ_REG64(addr) readq(addr)
139 #define WRITE_REG8(value, addr) writeb(value, addr)
140 #define WRITE_REG16(value, addr) writew(value, addr)
141 #define WRITE_REG32(value, addr) writel(value, addr)
306 #define LBA_CFG_TR4_ADDR_SETUP(d, addr) \
307 WRITE_REG32(((addr) & ~3), (d)->hba.base_addr + LBA_PCI_CFG_ADDR);
309 #define LBA_CFG_ADDR_SETUP(d, addr) { \
310 WRITE_REG32(((addr) & ~3), (d)->hba.base_addr + LBA_PCI_CFG_ADDR); \
888 static u##size lba_astro_in##size (struct pci_hba_data *d, u16 addr) \
891 t = READ_REG##size(astro_iop_base + addr); \
929 static void lba_astro_out##size (struct pci_hba_data *d, u16 addr, u##size val) \
931 DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, d, addr, val); \
932 WRITE_REG##size(val, astro_iop_base + addr); \
953 #define PIOP_TO_GMMIO(lba, addr) \
954 ((lba)->iop_base + (((addr)&0xFFFC)<<10) + ((addr)&3))
970 static u##size lba_pat_in##size (struct pci_hba_data *l, u16 addr) \
973 DBG_PORT("%s(0x%p, 0x%x) ->", __func__, l, addr); \
974 t = READ_REG##size(PIOP_TO_GMMIO(LBA_DEV(l), addr)); \
986 static void lba_pat_out##size (struct pci_hba_data *l, u16 addr, u##size val) \
988 void __iomem *where = PIOP_TO_GMMIO(LBA_DEV(l), addr); \
989 DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, l, addr, val); \
1115 /* MMIO space > 4GB phys addr; for 64-bit BAR */
1475 void __iomem *addr;
1478 addr = ioremap(dev->hpa.start, 4096);
1479 if (addr == NULL)
1483 func_class = READ_REG32(addr + LBA_FCLASS);
1539 addr + LBA_IOSAPIC_BASE);
1555 lba_dev->hba.base_addr = addr;