Lines Matching defs:dino_dev
298 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
299 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
301 DBG(KERN_WARNING "%s(0x%px, %d)\n", __func__, dino_dev, d->irq);
304 dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq));
305 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
310 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
311 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
314 DBG(KERN_WARNING "%s(0x%px, %d)\n", __func__, dino_dev, d->irq);
322 __raw_readl(dino_dev->hba.base_addr+DINO_IPR);
325 dino_dev->imr |= DINO_MASK_IRQ(local_irq); /* used in dino_isr() */
326 __raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
337 tmp = __raw_readl(dino_dev->hba.base_addr+DINO_ILR);
341 gsc_writel(dino_dev->gsc_irq.txn_data, dino_dev->gsc_irq.txn_addr);
349 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
361 dino_dev->gsc_irq.txn_addr = txn_affinity_addr(d->irq, cpu_irq);
362 eim = ((u32) dino_dev->gsc_irq.txn_addr) | dino_dev->gsc_irq.txn_data;
363 __raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0);
389 struct dino_device *dino_dev = intr_dev;
395 dino_dev->dino_irr0 =
397 mask = __raw_readl(dino_dev->hba.base_addr+DINO_IRR0) & DINO_IRR_MASK;
405 int irq = dino_dev->global_irq[local_irq];
419 mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr;
424 dino_dev->hba.base_addr, mask);
472 struct dino_device *dino_dev;
474 dino_dev = DINO_DEV(parisc_walk_tree(dev->bus->bridge));
475 return is_card_dino(&dino_dev->hba.dev->id);
511 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
516 res = &dino_dev->hba.lmmio_space;
524 res->name = dino_dev->hba.lmmio_space.name;
527 if (ccio_allocate_resource(dino_dev->hba.dev, res, _8MB,
542 bus->resource[0] = &(dino_dev->hba.io_space);
601 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
608 if (is_card_dino(&dino_dev->hba.dev->id)) {
609 dino_card_setup(bus, dino_dev->hba.base_addr);
645 if (is_card_dino(&dino_dev->hba.dev->id))
682 dino_assign_irq(dino_dev, irq_pin, &dev->irq);
689 dino_assign_irq(dino_dev, dev->irq, &dev->irq);
705 dino_card_init(struct dino_device *dino_dev)
710 status = __raw_readl(dino_dev->hba.base_addr+DINO_IO_STATUS);
713 dino_dev->hba.base_addr+DINO_IO_COMMAND);
717 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_GMASK);
718 __raw_writel(0x00000001, dino_dev->hba.base_addr+DINO_IO_FBB_EN);
719 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_ICR);
729 __raw_writel( brdg_feat, dino_dev->hba.base_addr+DINO_BRDG_FEAT);
736 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_IO_ADDR_EN);
738 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_DAMODE);
739 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIROR);
740 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIWOR);
742 __raw_writel(0x00000040, dino_dev->hba.base_addr+DINO_MLTIM);
743 __raw_writel(0x00000080, dino_dev->hba.base_addr+DINO_IO_CONTROL);
744 __raw_writel(0x0000008c, dino_dev->hba.base_addr+DINO_TLTIM);
747 __raw_writel(0x0000007e, dino_dev->hba.base_addr+DINO_PAMR);
748 __raw_writel(0x0000007f, dino_dev->hba.base_addr+DINO_PAPR);
749 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_PAMR);
756 __raw_writel(0x0000004f, dino_dev->hba.base_addr+DINO_PCICMD);
767 dino_bridge_init(struct dino_device *dino_dev, const char *name)
777 io_addr = __raw_readl(dino_dev->hba.base_addr + DINO_IO_ADDR_EN);
783 res = &dino_dev->hba.lmmio_space;
816 res = &dino_dev->hba.lmmio_space;
822 result = ccio_request_resource(dino_dev->hba.dev, &res[i]);
833 struct dino_device *dino_dev, const char *name)
839 pcibios_register_hba(&dino_dev->hba);
851 dev->irq = gsc_alloc_irq(&dino_dev->gsc_irq);
852 eim = ((u32) dino_dev->gsc_irq.txn_addr) | dino_dev->gsc_irq.txn_data;
863 status = request_irq(dev->irq, dino_isr, 0, name, dino_dev);
874 gsc_fixup_irqs(dev, dino_dev, dino_choose_irq);
881 __raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0);
887 __raw_readl(dino_dev->hba.base_addr+DINO_IRR0);
890 res = &dino_dev->hba.io_space;
896 res->start = HBA_PORT_BASE(dino_dev->hba.hba_num);
903 dino_dev->hba.base_addr);
934 struct dino_device *dino_dev; // Dino specific control struct
993 dino_dev = kzalloc(sizeof(struct dino_device), GFP_KERNEL);
994 if (!dino_dev) {
999 dino_dev->hba.dev = dev;
1000 dino_dev->hba.base_addr = ioremap(hpa, 4096);
1001 dino_dev->hba.lmmio_space_offset = PCI_F_EXTEND;
1002 spin_lock_init(&dino_dev->dinosaur_pen);
1003 dino_dev->hba.iommu = ccio_get_iommu(dev);
1006 dino_card_init(dino_dev);
1008 dino_bridge_init(dino_dev, name);
1011 if (dino_common_init(dev, dino_dev, name))
1014 dev->dev.platform_data = dino_dev;
1016 pci_add_resource_offset(&resources, &dino_dev->hba.io_space,
1017 HBA_PORT_BASE(dino_dev->hba.hba_num));
1018 if (dino_dev->hba.lmmio_space.flags)
1019 pci_add_resource_offset(&resources, &dino_dev->hba.lmmio_space,
1020 dino_dev->hba.lmmio_space_offset);
1021 if (dino_dev->hba.elmmio_space.flags)
1022 pci_add_resource_offset(&resources, &dino_dev->hba.elmmio_space,
1023 dino_dev->hba.lmmio_space_offset);
1024 if (dino_dev->hba.gmmio_space.flags)
1025 pci_add_resource(&resources, &dino_dev->hba.gmmio_space);
1027 dino_dev->hba.bus_num.start = dino_current_bus;
1028 dino_dev->hba.bus_num.end = 255;
1029 dino_dev->hba.bus_num.flags = IORESOURCE_BUS;
1030 pci_add_resource(&resources, &dino_dev->hba.bus_num);
1035 dino_dev->hba.hba_bus = bus = pci_create_root_bus(&dev->dev,