Lines Matching defs:efuse
39 * The Spreadtrum AP efuse contains 2 parts: normal efuse and secure efuse,
40 * and we can only access the normal efuse in kernel. So define the normal
52 * when reading or writing data to efuse memory, the controller can save double
80 * efuse controller, so we need one hardware spinlock to synchronize between
83 static int sprd_efuse_lock(struct sprd_efuse *efuse)
87 mutex_lock(&efuse->mutex);
89 ret = hwspin_lock_timeout_raw(efuse->hwlock,
92 dev_err(efuse->dev, "timeout get the hwspinlock\n");
93 mutex_unlock(&efuse->mutex);
100 static void sprd_efuse_unlock(struct sprd_efuse *efuse)
102 hwspin_unlock_raw(efuse->hwlock);
103 mutex_unlock(&efuse->mutex);
106 static void sprd_efuse_set_prog_power(struct sprd_efuse *efuse, bool en)
108 u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);
115 writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
117 /* Open or close efuse power need wait 1000us to make power stable. */
125 writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
127 /* Open or close efuse power need wait 1000us to make power stable. */
131 static void sprd_efuse_set_read_power(struct sprd_efuse *efuse, bool en)
133 u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
140 writel(val, efuse->base + SPRD_EFUSE_ENABLE);
142 /* Open or close efuse power need wait 1000us to make power stable. */
146 static void sprd_efuse_set_prog_lock(struct sprd_efuse *efuse, bool en)
148 u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
155 writel(val, efuse->base + SPRD_EFUSE_ENABLE);
158 static void sprd_efuse_set_auto_check(struct sprd_efuse *efuse, bool en)
160 u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
167 writel(val, efuse->base + SPRD_EFUSE_ENABLE);
170 static void sprd_efuse_set_data_double(struct sprd_efuse *efuse, bool en)
172 u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
179 writel(val, efuse->base + SPRD_EFUSE_ENABLE);
182 static void sprd_efuse_set_prog_en(struct sprd_efuse *efuse, bool en)
184 u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);
191 writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
194 static int sprd_efuse_raw_prog(struct sprd_efuse *efuse, u32 blk, bool doub,
201 * We need set the correct magic number before writing the efuse to
206 efuse->base + SPRD_EFUSE_MAGIC_NUM);
209 * Power on the efuse, enable programme and enable double data
212 sprd_efuse_set_prog_power(efuse, true);
213 sprd_efuse_set_prog_en(efuse, true);
214 sprd_efuse_set_data_double(efuse, doub);
221 sprd_efuse_set_auto_check(efuse, true);
223 writel(*data, efuse->base + SPRD_EFUSE_MEM(blk));
227 sprd_efuse_set_auto_check(efuse, false);
228 sprd_efuse_set_data_double(efuse, false);
231 * Check the efuse error status, if the programming is successful,
232 * we should lock this efuse block to avoid programming again.
234 status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
236 dev_err(efuse->dev,
240 efuse->base + SPRD_EFUSE_ERR_CLR);
243 sprd_efuse_set_prog_lock(efuse, lock);
244 writel(0, efuse->base + SPRD_EFUSE_MEM(blk));
245 sprd_efuse_set_prog_lock(efuse, false);
248 sprd_efuse_set_prog_power(efuse, false);
249 writel(0, efuse->base + SPRD_EFUSE_MAGIC_NUM);
254 static int sprd_efuse_raw_read(struct sprd_efuse *efuse, int blk, u32 *val,
260 * Need power on the efuse before reading data from efuse, and will
261 * power off the efuse after reading process.
263 sprd_efuse_set_read_power(efuse, true);
266 sprd_efuse_set_data_double(efuse, doub);
268 /* Start to read data from efuse block */
269 *val = readl(efuse->base + SPRD_EFUSE_MEM(blk));
272 sprd_efuse_set_data_double(efuse, false);
274 /* Power off the efuse */
275 sprd_efuse_set_read_power(efuse, false);
278 * Check the efuse error status and clear them if there are some
281 status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
283 dev_err(efuse->dev,
287 efuse->base + SPRD_EFUSE_ERR_CLR);
296 struct sprd_efuse *efuse = context;
297 bool blk_double = efuse->data->blk_double;
298 u32 index = offset / SPRD_EFUSE_BLOCK_WIDTH + efuse->data->blk_offset;
303 ret = sprd_efuse_lock(efuse);
307 ret = clk_prepare_enable(efuse->clk);
311 ret = sprd_efuse_raw_read(efuse, index, &data, blk_double);
317 clk_disable_unprepare(efuse->clk);
320 sprd_efuse_unlock(efuse);
326 struct sprd_efuse *efuse = context;
327 bool blk_double = efuse->data->blk_double;
331 ret = sprd_efuse_lock(efuse);
335 ret = clk_prepare_enable(efuse->clk);
352 ret = sprd_efuse_raw_prog(efuse, offset, blk_double, lock, val);
354 clk_disable_unprepare(efuse->clk);
357 sprd_efuse_unlock(efuse);
366 struct sprd_efuse *efuse;
376 efuse = devm_kzalloc(&pdev->dev, sizeof(*efuse), GFP_KERNEL);
377 if (!efuse)
380 efuse->base = devm_platform_ioremap_resource(pdev, 0);
381 if (IS_ERR(efuse->base))
382 return PTR_ERR(efuse->base);
390 efuse->hwlock = devm_hwspin_lock_request_specific(&pdev->dev, ret);
391 if (!efuse->hwlock) {
396 efuse->clk = devm_clk_get(&pdev->dev, "enable");
397 if (IS_ERR(efuse->clk)) {
399 return PTR_ERR(efuse->clk);
402 mutex_init(&efuse->mutex);
403 efuse->dev = &pdev->dev;
404 efuse->data = pdata;
409 econfig.name = "sprd-efuse";
410 econfig.size = efuse->data->blk_nums * SPRD_EFUSE_BLOCK_WIDTH;
413 econfig.priv = efuse;
425 { .compatible = "sprd,ums312-efuse", .data = &ums312_data },
432 .name = "sprd-efuse",
440 MODULE_DESCRIPTION("Spreadtrum AP efuse driver");