Lines Matching defs:MESON_MX_EFUSE_CNTL1
21 #define MESON_MX_EFUSE_CNTL1 0x04
71 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
82 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
97 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
101 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
104 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
108 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
111 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
118 readl(efuse->base + MESON_MX_EFUSE_CNTL1);
120 err = readl_poll_timeout_atomic(efuse->base + MESON_MX_EFUSE_CNTL1,
146 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
161 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,