Lines Matching defs:path
591 "[TSSI][EFUSE] path=%d cck[%d]=0x%x\n",
601 "[TSSI][EFUSE] path=%d mcs[%d]=0x%x\n",
705 "[TSSI] path=%d idx=%d trim=0x%x addr=0x%x\n",
722 "[THERMAL][TRIM] path=%d thermal_trim=0x%x\n",
752 "[THERMAL][TRIM] path=%d thermal_setting=0x%x\n",
770 "[PA_BIAS][TRIM] path=%d pa_bias_trim=0x%x\n",
796 "[PA_BIAS][TRIM] path=%d 2G=0x%x 5G=0x%x\n",
813 int path, i;
816 for (path = 0; path < 2; path++)
818 if (comp_addrs[path][i] == 0)
821 data = phycap_map[comp_addrs[path][i] - phycap_addr];
823 &gain->comp[path][i]);
974 enum rtw89_rf_path path)
985 reg = bb_gain_lna[i].gain_g[path];
987 reg = bb_gain_lna[i].gain_a[path];
990 val = gain->lna_gain[gain_band][path][i];
996 reg = bb_gain_tia[i].gain_g[path];
998 reg = bb_gain_tia[i].gain_a[path];
1001 val = gain->tia_gain[gain_band][path][i];
1019 u8 path;
1024 for (path = RF_PATH_A; path < BB_PATH_NUM_8852B; path++) {
1025 tmp = efuse_gain->comp[path][subband];
1027 rtw89_phy_write32_mask(rtwdev, gain_err_addr[path], MASKBYTE0, tmp);
1170 static void rtw8852b_bw_setting(struct rtw89_dev *rtwdev, u8 bw, u8 path)
1177 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x1);
1178 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x0);
1181 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x2);
1182 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x1);
1185 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0);
1186 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2);
1189 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0);
1190 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2);
1193 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0);
1194 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2);
1482 enum rtw89_rf_path path)
1488 rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], B_P0_TXPW_RSTB_MANON, 0x0);
1489 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x0);
1491 rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], B_P0_TXPW_RSTB_MANON, 0x1);
1492 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x1);
2136 void rtw8852b_set_trx_mask(struct rtw89_dev *rtwdev, u8 path, u8 group, u32 val)
2138 rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x20000);
2139 rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, group);
2140 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, val);
2141 rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x0);
2169 /* set path-A(S0) Tx/Rx no-mask if GNT_WL=0 && BT_S1=tx group */
2384 u8 path;
2388 for (path = 0; path < rtwdev->chip->rf_path_num; path++) {
2389 status->chains |= BIT(path);
2390 status->chain_signal[path] = RTW89_RSSI_RAW_TO_DBM(rx_power[path]);