Lines Matching defs:sel
50 u8 sel;
654 int sel;
662 ret = kstrtoint(buf, 0, &sel);
666 if (sel < RTW89_DBG_SEL_MAC_00 || sel > RTW89_DBG_SEL_RFC) {
667 rtw89_info(rtwdev, "invalid args: %d\n", sel);
671 if (sel == RTW89_DBG_SEL_MAC_30 && chip->chip_id != RTL8852C) {
672 rtw89_info(rtwdev, "sel %d is address hole on chip %d\n", sel,
677 debugfs_priv->cb_data = sel;
770 u32 sel, start_addr, len;
778 num = sscanf(buf, "%x %x %x", &sel, &start_addr, &len);
780 rtw89_info(rtwdev, "invalid format: <sel> <start> <len>\n");
784 debugfs_priv->mac_mem.sel = sel;
789 sel, start_addr, len);
796 u8 sel, u32 start_addr, u32 len)
810 base_addr = mac->mem_base_addrs[sel];
839 if (debugfs_priv->mac_mem.sel >= RTW89_MAC_MEM_NUM)
843 switch (debugfs_priv->mac_mem.sel) {
860 debugfs_priv->mac_mem.sel,
880 int sel, set;
889 num = sscanf(buf, "%d %d", &sel, &set);
891 rtw89_info(rtwdev, "invalid format: <sel> <set>\n");
896 switch (sel) {
913 rtw89_info(rtwdev, "invalid args: sel %d set %d\n", sel, set);
918 enable ? "Enable" : "Disable", sel);
1110 seq_printf(m, "sel=%x,R_AX_SEC_DEBUG2=0x%08x\n",
2195 struct rtw89_dev *rtwdev, u32 sel)
2203 switch (sel) {
2486 index = sel - RTW89_DBG_PORT_SEL_DSPT_HDT_TX0;
2522 index = sel + 9 - RTW89_DBG_PORT_SEL_DSPT_HDT_TX9;
2574 index = sel + 5 - RTW89_DBG_PORT_SEL_DSPT_CDT_TX5;
2593 index = sel + 0xA - RTW89_DBG_PORT_SEL_DSPT_CDT_TXA;
2611 index = sel + 1 - RTW89_DBG_PORT_SEL_DSPT_HDT_RX1;
2767 static bool is_dbg_port_valid(struct rtw89_dev *rtwdev, u32 sel)
2770 sel >= RTW89_DBG_PORT_SEL_PCIE_TXDMA &&
2771 sel <= RTW89_DBG_PORT_SEL_PCIE_MISC2)
2774 sel >= RTW89_DBG_PORT_SEL_PTCL_C1 &&
2775 sel <= RTW89_DBG_PORT_SEL_TXTF_INFOH_C1)
2778 sel >= RTW89_DBG_PORT_SEL_WDE_BUFMGN_FREEPG &&
2779 sel <= RTW89_DBG_PORT_SEL_PKTINFO)
2782 sel >= RTW89_DBG_PORT_SEL_DSPT_HDT_TX0 &&
2783 sel <= RTW89_DBG_PORT_SEL_DSPT_FLOW_CTRL)
2786 sel >= RTW89_DBG_PORT_SEL_PTCL_C0 &&
2787 sel <= RTW89_DBG_PORT_SEL_TXTF_INFOH_C0)
2790 sel >= RTW89_DBG_PORT_SEL_PTCL_C1 &&
2791 sel <= RTW89_DBG_PORT_SEL_TXTF_INFOH_C1)
2798 struct seq_file *m, u32 sel)
2806 info = rtw89_debug_mac_dbg_port_sel(m, rtwdev, sel);
2808 rtw89_err(rtwdev, "failed to select debug port %d\n", sel);
2817 switch (sel) {
2961 u32 sel;
2964 for (sel = RTW89_DBG_PORT_SEL_PTCL_C0;
2965 sel < RTW89_DBG_PORT_SEL_LAST; sel++) {
2966 if (!is_dbg_port_valid(rtwdev, sel))
2968 ret = rtw89_debug_mac_dbg_port_dump(rtwdev, m, sel);
2971 "failed to dump debug port %d\n", sel);