Lines Matching refs:cxtbl
76 { .dur = cpu_to_le16(__dur), .cxtbl = cpu_to_le32(__cxtbl), \
100 static const u32 cxtbl[] = {
1628 __func__, i, dm->slot[i].dur, dm->slot[i].cxtbl,
2474 _btc->dm.slot[_sid].cxtbl = cpu_to_le32(tbl); \
2479 #define _slot_set_tbl(btc, sid, tbl) (btc)->dm.slot[sid].cxtbl = cpu_to_le32(tbl)
2562 tbl_w1 = cxtbl[1];
2564 tbl_w1 = cxtbl[8];
2565 tbl_b1 = cxtbl[3];
2566 tbl_b4 = cxtbl[3];
2568 tbl_w1 = cxtbl[16];
2569 tbl_b1 = cxtbl[17];
2570 tbl_b4 = cxtbl[17];
2580 _slot_set_tbl(btc, CXST_OFF, cxtbl[2]);
2590 _slot_set_tbl(btc, CXST_OFF, cxtbl[2]);
2593 _slot_set_tbl(btc, CXST_OFF, cxtbl[1]);
2596 _slot_set_tbl(btc, CXST_OFF, cxtbl[0]);
2599 _slot_set_tbl(btc, CXST_OFF, cxtbl[16]);
2602 _slot_set_tbl(btc, CXST_OFF, cxtbl[17]);
2605 _slot_set_tbl(btc, CXST_OFF, cxtbl[18]);
2608 _slot_set_tbl(btc, CXST_OFF, cxtbl[5]);
2611 _slot_set_tbl(btc, CXST_OFF, cxtbl[8]);
2614 _slot_set_tbl(btc, CXST_OFF, cxtbl[6]);
2624 _slot_set_tbl(btc, CXST_OFF, cxtbl[8]);
2640 _slot_set(btc, CXST_E2G, 20, cxtbl[1], SLOT_ISO);
2668 _slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_MIX);
2870 tbl_w1 = cxtbl[1];
2872 tbl_w1 = cxtbl[7]; /* Ack/BA no break bt Hi-Pri-rx */
2874 tbl_w1 = cxtbl[8];
2878 tbl_b1 = cxtbl[3];
2879 tbl_b4 = cxtbl[3];
2881 tbl_b1 = cxtbl[4]; /* Ack/BA no break bt Hi-Pri-rx */
2882 tbl_b4 = cxtbl[4];
2884 tbl_b1 = cxtbl[2];
2885 tbl_b4 = cxtbl[2];
2888 tbl_w1 = cxtbl[16];
2889 tbl_b1 = cxtbl[17];
2890 tbl_b4 = cxtbl[17];
2900 _slot_set_tbl(btc, CXST_OFF, cxtbl[2]);
2909 _slot_set_tbl(btc, CXST_OFF, cxtbl[2]);
2912 _slot_set_tbl(btc, CXST_OFF, cxtbl[1]);
2915 _slot_set_tbl(btc, CXST_OFF, cxtbl[0]);
2919 _slot_set_tbl(btc, CXST_OFF, cxtbl[16]);
2922 _slot_set_tbl(btc, CXST_OFF, cxtbl[0]);
2925 _slot_set_tbl(btc, CXST_OFF, cxtbl[24]);
2928 _slot_set_tbl(btc, CXST_OFF, cxtbl[5]);
2931 _slot_set_tbl(btc, CXST_OFF, cxtbl[8]);
2934 _slot_set_tbl(btc, CXST_OFF, cxtbl[7]);
2937 _slot_set_tbl(btc, CXST_OFF, cxtbl[6]);
2950 _slot_set_tbl(btc, CXST_OFF, cxtbl[8]);
2963 tbl_w1 = cxtbl[16];
2973 _slot_set(btc, CXST_E2G, 20, cxtbl[1], SLOT_ISO);
3005 _slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_ISO);
3009 _slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_MIX);
6932 s->dur, s->cxtbl, s->cxtype);
6937 s->dur, s->cxtbl, s->cxtype);