Lines Matching refs:MASKLWORD
308 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa501);
311 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa500);
314 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa005);
338 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa501);
341 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa500);
344 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa005);
347 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa5a5);
627 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000);
630 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x1525);
753 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x3231);
755 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x1111);
758 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x3231);
760 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x1111);
1300 rtw_coex_write_indirect_reg(rtwdev, LTE_WL_TRX_CTRL, MASKLWORD, 0xffff);
1303 rtw_coex_write_indirect_reg(rtwdev, LTE_BT_TRX_CTRL, MASKLWORD, 0xffff);
2506 {0x42a, MASKLWORD, RTW_REG_DOMAIN_MAC16},
2509 {0x454, MASKLWORD, RTW_REG_DOMAIN_MAC16},