Lines Matching defs:path
232 u8 path;
239 for (path = 0; path < hal->rf_path_num; path++) {
240 addr = chip->dig[path].addr;
241 mask = chip->dig[path].mask;
866 u8 path;
868 for (path = 0; path < path_num; path++) {
869 power = rf_power[path];
903 rtw_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
930 rtw_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
948 /* toggle read edge of path A */
977 rtw_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
1015 rtw_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
2069 WARN(1, "invalid arguments, band=%d, bw=%d, path=%d, rate=%d, ch=%d\n",
2080 .path = rf_path,
2090 WARN(1, "invalid arguments, sar_band=%d, path=%d, rate=%d\n",
2095 void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw,
2108 pwr_idx = &rtwdev->efuse.txpwr_idx_table[path];
2117 *offset = hal->tx_pwr_by_rate_offset_2g[path][rate];
2123 *offset = hal->tx_pwr_by_rate_offset_5g[path][rate];
2126 *limit = rtw_phy_get_tx_power_limit(rtwdev, band, bw, path,
2130 *sar = rtw_phy_get_tx_power_sar(rtwdev, hal->sar_band, path, rate);
2162 u8 ch, u8 path, u8 rs)
2181 pwr_idx = rtw_phy_get_tx_power_index(rtwdev, path, rate,
2183 hal->tx_pwr_tbl[path][rate] = pwr_idx;
2187 /* set tx power level by path for each rates, note that the order of the rates
2193 u8 ch, u8 path)
2205 rtw_phy_set_tx_power_index_by_rs(rtwdev, ch, path, rs);
2212 u8 path;
2216 for (path = 0; path < hal->rf_path_num; path++)
2217 rtw_phy_set_tx_power_level_by_path(rtwdev, channel, path);
2225 rtw_phy_tx_power_by_rate_config_by_path(struct rtw_hal *hal, u8 path,
2236 base_2g = hal->tx_pwr_by_rate_offset_2g[path][base_idx];
2237 base_5g = hal->tx_pwr_by_rate_offset_5g[path][base_idx];
2238 hal->tx_pwr_by_rate_base_2g[path][rs] = base_2g;
2239 hal->tx_pwr_by_rate_base_5g[path][rs] = base_5g;
2242 hal->tx_pwr_by_rate_offset_2g[path][rate_idx] -= base_2g;
2243 hal->tx_pwr_by_rate_offset_5g[path][rate_idx] -= base_5g;
2249 u8 path;
2251 for (path = 0; path < RTW_RF_PATH_MAX; path++) {
2252 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
2255 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
2258 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
2261 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
2264 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
2267 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
2322 u8 regd, path, rate, rs, bw;
2325 for (path = 0; path < RTW_RF_PATH_MAX; path++) {
2327 hal->tx_pwr_by_rate_offset_2g[path][rate] = 0;
2328 hal->tx_pwr_by_rate_offset_5g[path][rate] = 0;
2382 void rtw_phy_pwrtrack_avg(struct rtw_dev *rtwdev, u8 thermal, u8 path)
2386 ewma_thermal_add(&dm_info->avg_thermal[path], thermal);
2387 dm_info->thermal_avg[path] =
2388 ewma_thermal_read(&dm_info->avg_thermal[path]);
2393 u8 path)
2396 u8 avg = ewma_thermal_read(&dm_info->avg_thermal[path]);
2405 u8 rtw_phy_pwrtrack_get_delta(struct rtw_dev *rtwdev, u8 path)
2410 therm_avg = dm_info->thermal_avg[path];
2411 therm_efuse = rtwdev->efuse.thermal_meter[path];
2491 rtw_dbg(rtwdev, RTW_DBG_PATH_DIV, "Switch TX path=%s\n",
2500 enum rtw_bb_path path = path_div->current_tx_path;
2513 path = (rssi_a > rssi_b) ? BB_PATH_A : BB_PATH_B;
2519 rtw_phy_set_tx_path_by_reg(rtwdev, path);