Lines Matching refs:u8
391 u8 pkt_offset;
392 u8 txdw0;
405 u8 pkt_offset;
406 u8 txdw0;
583 u8 gain:7, trsw:1;
585 u8 trsw:1, gain:7;
594 u8 ch_corr[RTL8723A_MAX_RF_PATHS];
595 u8 cck_sig_qual_ofdm_pwdb_all;
596 u8 cck_agc_rpt_ofdm_cfosho_a;
597 u8 cck_rpt_b_ofdm_cfosho_b;
598 u8 reserved_1;
599 u8 noise_power_db_msb;
601 u8 pcts_mask[RTL8723A_MAX_RF_PATHS];
603 u8 path_rxsnr[RTL8723A_MAX_RF_PATHS];
604 u8 noise_power_db_lsb;
605 u8 reserved_2[3];
606 u8 stream_csi[RTL8723A_MAX_RF_PATHS];
607 u8 stream_target_csi[RTL8723A_MAX_RF_PATHS];
609 u8 reserved_3;
612 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
613 u8 sgi_en:1;
614 u8 rxsc:2;
615 u8 idle_long:1;
616 u8 r_ant_train_en:1;
617 u8 antenna_select_b:1;
618 u8 antenna_select:1;
620 u8 antenna_select:1;
621 u8 antenna_select_b:1;
622 u8 r_ant_train_en:1;
623 u8 idle_long:1;
624 u8 rxsc:2;
625 u8 sgi_en:1;
626 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
632 u8 page_num;
633 u8 pwdb;
635 u8 gain: 6;
636 u8 rsvd_0: 1;
637 u8 trsw: 1;
639 u8 trsw: 1;
640 u8 rsvd_0: 1;
641 u8 gain: 6;
643 u8 rsvd_1;
646 u8 rsvd_2;
648 u8 rxsc: 4;
649 u8 agc_table: 4;
651 u8 agc_table: 4;
652 u8 rxsc: 4;
654 u8 channel;
655 u8 band;
660 u8 antidx_a: 3;
661 u8 antidx_b: 3;
662 u8 rsvd_3: 2;
663 u8 antidx_c: 3;
664 u8 antidx_d: 3;
665 u8 rsvd_4:2;
667 u8 rsvd_3: 2;
668 u8 antidx_b: 3;
669 u8 antidx_a: 3;
670 u8 rsvd_4:2;
671 u8 antidx_d: 3;
672 u8 antidx_c: 3;
676 u8 signal_quality;
678 u8 vga:5;
679 u8 lna_l:3;
680 u8 bb_power:6;
681 u8 rsvd_9:1;
682 u8 lna_h:1;
684 u8 lna_l:3;
685 u8 vga:5;
686 u8 lna_h:1;
687 u8 rsvd_9:1;
688 u8 bb_power:6;
690 u8 rsvd_5;
704 u8 page_num;
705 u8 pwdb[4];
707 u8 l_rxsc: 4;
708 u8 ht_rxsc: 4;
710 u8 ht_rxsc: 4;
711 u8 l_rxsc: 4;
713 u8 channel;
715 u8 band: 2;
716 u8 rsvd_0: 1;
717 u8 hw_antsw_occu: 1;
718 u8 gnt_bt: 1;
719 u8 ldpc: 1;
720 u8 stbc: 1;
721 u8 beamformed: 1;
723 u8 beamformed: 1;
724 u8 stbc: 1;
725 u8 ldpc: 1;
726 u8 gnt_bt: 1;
727 u8 hw_antsw_occu: 1;
728 u8 rsvd_0: 1;
729 u8 band: 2;
735 u8 antidx_a: 3;
736 u8 antidx_b: 3;
737 u8 rsvd_1: 2;
738 u8 antidx_c: 3;
739 u8 antidx_d: 3;
740 u8 rsvd_2: 2;
742 u8 rsvd_1: 2;
743 u8 antidx_b: 3;
744 u8 antidx_a: 3;
745 u8 rsvd_2: 2;
746 u8 antidx_d: 3;
747 u8 antidx_c: 3;
751 u8 paid;
753 u8 paid_msb: 1;
754 u8 gid: 6;
755 u8 rsvd_3: 1;
757 u8 rsvd_3: 1;
758 u8 gid: 6;
759 u8 paid_msb: 1;
761 u8 intf_pos;
763 u8 intf_pos_msb: 1;
764 u8 rsvd_4: 2;
765 u8 nb_intf_flag: 1;
766 u8 rf_mode: 2;
767 u8 rsvd_5: 2;
769 u8 rsvd_5: 2;
770 u8 rf_mode: 2;
771 u8 nb_intf_flag: 1;
772 u8 rsvd_4: 2;
773 u8 intf_pos_msb: 1;
788 u8 page_num;
789 u8 pwdb[4];
791 u8 l_rxsc: 4;
792 u8 ht_rxsc: 4;
794 u8 ht_rxsc: 4;
795 u8 l_rxsc: 4;
797 u8 channel;
799 u8 band: 2;
800 u8 rsvd_0: 1;
801 u8 hw_antsw_occu: 1;
802 u8 gnt_bt: 1;
803 u8 ldpc: 1;
804 u8 stbc: 1;
805 u8 beamformed: 1;
807 u8 beamformed: 1;
808 u8 stbc: 1;
809 u8 ldpc: 1;
810 u8 gnt_bt: 1;
811 u8 hw_antsw_occu: 1;
812 u8 rsvd_0: 1;
813 u8 band: 2;
818 u8 shift_l_map: 6;
819 u8 rsvd_1: 2;
821 u8 rsvd_1: 2;
822 u8 shift_l_map: 6;
824 u8 cnt_pw2cca;
826 u8 agc_table_a: 4;
827 u8 agc_table_b: 4;
828 u8 agc_table_c: 4;
829 u8 agc_table_d: 4;
831 u8 agc_table_b: 4;
832 u8 agc_table_a: 4;
833 u8 agc_table_d: 4;
834 u8 agc_table_c: 4;
838 u8 cnt_cca2agc_rdy;
840 u8 gain_a: 6;
841 u8 rsvd_2: 1;
842 u8 trsw_a: 1;
843 u8 gain_b: 6;
844 u8 rsvd_3: 1;
845 u8 trsw_b: 1;
846 u8 gain_c: 6;
847 u8 rsvd_4: 1;
848 u8 trsw_c: 1;
849 u8 gain_d: 6;
850 u8 rsvd_5: 1;
851 u8 trsw_d: 1;
852 u8 aagc_step_a: 2;
853 u8 aagc_step_b: 2;
854 u8 aagc_step_c: 2;
855 u8 aagc_step_d: 2;
857 u8 trsw_a: 1;
858 u8 rsvd_2: 1;
859 u8 gain_a: 6;
860 u8 trsw_b: 1;
861 u8 rsvd_3: 1;
862 u8 gain_b: 6;
863 u8 trsw_c: 1;
864 u8 rsvd_4: 1;
865 u8 gain_c: 6;
866 u8 trsw_d: 1;
867 u8 rsvd_5: 1;
868 u8 gain_d: 6;
869 u8 aagc_step_d: 2;
870 u8 aagc_step_c: 2;
871 u8 aagc_step_b: 2;
872 u8 aagc_step_a: 2;
874 u8 ht_aagc_gain[4];
875 u8 dagc_gain[4];
877 u8 counter: 6;
878 u8 rsvd_6: 2;
879 u8 syn_count: 5;
880 u8 rsvd_7:3;
882 u8 rsvd_6: 2;
883 u8 counter: 6;
884 u8 rsvd_7:3;
885 u8 syn_count: 5;
901 u8 category; /* AP/NIC and USB/PCI */
902 u8 function;
905 u8 minor_version; /* FW Subversion, default 0x00 */
906 u8 reserved1;
908 u8 month; /* Release time Month field */
909 u8 date; /* Release time Date field */
910 u8 hour; /* Release time Hour field */
911 u8 minute; /* Release time Minute field */
922 u8 data[];
965 u8 res0[0xe];
966 u8 cck_tx_power_index_A[3]; /* 0x10 */
967 u8 cck_tx_power_index_B[3];
968 u8 ht40_1s_tx_power_index_A[3]; /* 0x16 */
969 u8 ht40_1s_tx_power_index_B[3];
978 u8 channel_plan; /* 0x28 */
979 u8 tssi_a;
980 u8 thermal_meter;
981 u8 rf_regulatory;
982 u8 rf_option_2;
983 u8 rf_option_3;
984 u8 rf_option_4;
985 u8 res7;
986 u8 version /* 0x30 */;
987 u8 customer_id_major;
988 u8 customer_id_minor;
989 u8 xtal_k;
990 u8 chipset; /* 0x34 */
991 u8 res8[0x82];
992 u8 vid; /* 0xb7 */
993 u8 res9;
994 u8 pid; /* 0xb9 */
995 u8 res10[0x0c];
996 u8 mac_addr[ETH_ALEN]; /* 0xc6 */
997 u8 res11[2];
998 u8 vendor_name[7];
999 u8 res12[2];
1000 u8 device_name[0x29]; /* 0xd7 */
1006 u8 res0[2];
1013 u8 res1[4];
1014 u8 mac_addr[ETH_ALEN]; /* 0x16 */
1015 u8 res2[2];
1016 u8 vendor_name[7];
1017 u8 res3[3];
1018 u8 device_name[0x14]; /* 0x28 */
1019 u8 res4[0x1e]; /* 0x3c */
1020 u8 cck_tx_power_index_A[3]; /* 0x5a */
1021 u8 cck_tx_power_index_B[3];
1022 u8 ht40_1s_tx_power_index_A[3]; /* 0x60 */
1023 u8 ht40_1s_tx_power_index_B[3];
1033 u8 channel_plan; /* 0x75 */
1034 u8 tssi_a;
1035 u8 tssi_b;
1036 u8 thermal_meter; /* xtal_k */ /* 0x78 */
1037 u8 rf_regulatory;
1038 u8 rf_option_2;
1039 u8 rf_option_3;
1040 u8 rf_option_4;
1041 u8 res5[1]; /* 0x7d */
1042 u8 version;
1043 u8 customer_id;
1061 u8 cck_base[6];
1062 u8 ht40_base[5];
1065 u8 dummy5g[24]; /* max channel group (14) + power diff offset (10) */
1070 u8 res0[0x0e];
1075 u8 channel_plan; /* 0xb8 */
1076 u8 xtal_k;
1077 u8 thermal_meter;
1078 u8 iqk_lck;
1079 u8 pa_type; /* 0xbc */
1080 u8 lna_type_2g; /* 0xbd */
1081 u8 res2[3];
1082 u8 rf_board_option;
1083 u8 rf_feature_option;
1084 u8 rf_bt_setting;
1085 u8 eeprom_version;
1086 u8 eeprom_customer_id;
1087 u8 res3[2];
1088 u8 tx_pwr_calibrate_rate;
1089 u8 rf_antenna_option; /* 0xc9 */
1090 u8 rfe_option;
1091 u8 res4[9];
1092 u8 usb_optional_function;
1093 u8 res5[0x1e];
1094 u8 res6[2];
1095 u8 serial[0x0b]; /* 0xf5 */
1096 u8 vid; /* 0x100 */
1097 u8 res7;
1098 u8 pid;
1099 u8 res8[4];
1100 u8 mac_addr[ETH_ALEN]; /* 0x107 */
1101 u8 res9[2];
1102 u8 vendor_name[0x07];
1103 u8 res10[2];
1104 u8 device_name[0x14];
1105 u8 res11[0xcf];
1106 u8 package_type; /* 0x1fb */
1107 u8 res12[0x4];
1111 u8 cck_base[6];
1112 u8 ht40_base[5];
1115 u8 dummy5g[24]; /* max channel group (14) + power diff offset (10) */
1120 u8 res0[0x0e];
1123 u8 res2[0x54];
1124 u8 channel_plan; /* 0xb8 */
1125 u8 xtal_k;
1126 u8 thermal_meter;
1127 u8 iqk_lck;
1128 u8 pa_type; /* 0xbc */
1129 u8 lna_type_2g; /* 0xbd */
1130 u8 res3[1];
1131 u8 lna_type_5g; /* 0xbf */
1132 u8 res4[1];
1133 u8 rf_board_option;
1134 u8 rf_feature_option;
1135 u8 rf_bt_setting;
1136 u8 eeprom_version;
1137 u8 eeprom_customer_id;
1138 u8 res5[3];
1139 u8 rf_antenna_option; /* 0xc9 */
1140 u8 res6[6];
1141 u8 vid; /* 0xd0 */
1142 u8 res7[1];
1143 u8 pid; /* 0xd2 */
1144 u8 res8[1];
1145 u8 usb_optional_function;
1146 u8 res9[2];
1147 u8 mac_addr[ETH_ALEN]; /* 0xd7 */
1148 u8 device_info[80];
1149 u8 res11[3];
1150 u8 unknown[0x0d]; /* 0x130 */
1151 u8 res12[0xc3];
1155 u8 cck_base[6];
1156 u8 ht40_base[5];
1163 u8 res0[0x0e];
1165 u8 res1[0x9c]; /* 0x1c */
1166 u8 channel_plan; /* 0xb8 */
1167 u8 xtal_k;
1168 u8 thermal_meter;
1169 u8 iqk_lck;
1170 u8 res2[5];
1171 u8 rf_board_option;
1172 u8 rf_feature_option;
1173 u8 rf_bt_setting;
1174 u8 eeprom_version;
1175 u8 eeprom_customer_id;
1176 u8 res3[2];
1177 u8 kfree_thermal_k_on;
1178 u8 rf_antenna_option; /* 0xc9 */
1179 u8 rfe_option;
1180 u8 country_code;
1181 u8 res4[4];
1182 u8 vid; /* 0xd0 */
1183 u8 res5[1];
1184 u8 pid; /* 0xd2 */
1185 u8 res6[1];
1186 u8 usb_optional_function;
1187 u8 res7[2];
1188 u8 mac_addr[ETH_ALEN]; /* 0xd7 */
1189 u8 res8[2];
1190 u8 vendor_name[7];
1191 u8 res9[2];
1192 u8 device_name[7]; /* 0xe8 */
1193 u8 res10[0x41];
1194 u8 unknown[0x0d]; /* 0x130 */
1195 u8 res11[0xc3];
1200 u8 res0[0x0e];
1202 u8 res1[0x7e]; /* 0x3a */
1203 u8 channel_plan; /* 0xb8 */
1204 u8 xtal_k;
1205 u8 thermal_meter;
1206 u8 iqk_lck;
1207 u8 res2[5];
1208 u8 rf_board_option;
1209 u8 rf_feature_option;
1210 u8 rf_bt_setting;
1211 u8 eeprom_version;
1212 u8 eeprom_customer_id;
1213 u8 res3[3];
1214 u8 rf_antenna_option; /* 0xc9 */
1215 u8 res4[6];
1216 u8 vid; /* 0xd0 */
1217 u8 res5[1];
1218 u8 pid; /* 0xd2 */
1219 u8 res6[1];
1220 u8 usb_optional_function;
1221 u8 res7[2];
1222 u8 mac_addr[ETH_ALEN]; /* 0xd7 */
1223 u8 res8[2];
1224 u8 vendor_name[7];
1225 u8 res9[2];
1226 u8 device_name[0x0b]; /* 0xe8 */
1227 u8 res10[2];
1228 u8 serial[0x0b]; /* 0xf5 */
1229 u8 res11[0x30];
1230 u8 unknown[0x0d]; /* 0x130 */
1231 u8 res12[0xc3];
1236 u8 res0[0x1e];
1238 u8 res1[0x9c]; /* 0x2c */
1239 u8 channel_plan; /* 0xc8 */
1240 u8 xtal_k; /* 0xc9 */
1241 u8 thermal_meter; /* 0xca */
1242 u8 res2[0x4f];
1243 u8 mac_addr[ETH_ALEN]; /* 0x11a */
1244 u8 res3[0x11];
1245 u8 rf_board_option; /* 0x131 */
1246 u8 res4[2];
1247 u8 eeprom_version; /* 0x134 */
1248 u8 eeprom_customer_id; /* 0x135 */
1249 u8 res5[5];
1250 u8 country_code; /* 0x13b */
1251 u8 res6[0x84];
1252 u8 vid[2]; /* 0x1c0 */
1253 u8 pid[2]; /* 0x1c2 */
1254 u8 res7[0x3c];
1259 u8 res0[0x0e];
1262 u8 res2[0x54];
1263 u8 channel_plan; /* 0xb8 */
1264 u8 xtal_k; /* 0xb9 */
1265 u8 thermal_meter; /* 0xba */
1266 u8 iqk_lck; /* 0xbb */
1267 u8 pa_type; /* 0xbc */
1268 u8 lna_type_2g; /* 0xbd */
1269 u8 res3[1];
1270 u8 lna_type_5g; /* 0xbf */
1271 u8 res4[1];
1272 u8 rf_board_option; /* 0xc1 */
1273 u8 rf_feature_option; /* 0xc2 */
1274 u8 rf_bt_setting; /* 0xc3 */
1275 u8 eeprom_version; /* 0xc4 */
1276 u8 eeprom_customer_id; /* 0xc5 */
1277 u8 res5[3];
1278 u8 rf_antenna_option; /* 0xc9 */
1279 u8 rfe_option; /* 0xca */
1280 u8 country_code; /* 0xcb */
1281 u8 res6[52];
1282 u8 vid[2]; /* 0x100 */
1283 u8 pid[2]; /* 0x102 */
1284 u8 usb_optional_function; /* 0x104 */
1285 u8 res7[2];
1286 u8 mac_addr[ETH_ALEN]; /* 0x107 */
1287 u8 device_info[80]; /* 0x10d */
1288 u8 res9[163];
1293 u8 val;
1302 u8 reg;
1415 u8 cmd;
1416 u8 data[7];
1427 u8 cmd;
1428 u8 data;
1431 u8 cmd;
1433 u8 arg;
1437 u8 cmd;
1438 u8 parm;
1439 u8 macid;
1440 u8 macid_end;
1443 u8 cmd;
1444 u8 macid;
1449 u8 data1;
1457 u8 data2;
1458 u8 ramask0;
1459 u8 ramask1;
1460 u8 ramask2;
1461 u8 ramask3;
1464 u8 cmd;
1465 u8 data1;
1466 u8 data2;
1467 u8 data3;
1468 u8 data4;
1469 u8 data5;
1472 u8 cmd;
1473 u8 data;
1476 u8 cmd;
1477 u8 operreq;
1478 u8 opcode;
1479 u8 data;
1480 u8 addr;
1483 u8 cmd;
1484 u8 data;
1487 u8 cmd;
1488 u8 data;
1491 u8 cmd;
1492 u8 ant_inverse;
1493 u8 int_switch_type;
1496 u8 cmd;
1497 u8 data;
1500 u8 cmd;
1501 u8 macid;
1502 u8 unknown0;
1503 u8 rssi;
1510 u8 data;
1515 u8 ra_th_offset;
1516 u8 unknown1;
1517 u8 unknown2;
1593 u8 id;
1594 u8 seq;
1597 u8 payload[0];
1600 u8 ext_id;
1601 u8 status:4;
1602 u8 retlen:4;
1603 u8 opcode_ver:4;
1604 u8 req_num:4;
1605 u8 payload[2];
1608 u8 response_source:4;
1609 u8 dummy0_0:4;
1611 u8 bt_info;
1613 u8 retry_count:4;
1614 u8 dummy2_0:1;
1615 u8 bt_page:1;
1616 u8 tx_rx_mask:1;
1617 u8 dummy2_2:1;
1619 u8 rssi;
1621 u8 basic_rate:1;
1622 u8 bt_has_reset:1;
1623 u8 dummy4_1:1;
1624 u8 ignore_wlan:1;
1625 u8 auto_report:1;
1626 u8 dummy4_2:3;
1628 u8 a4;
1629 u8 a5;
1632 u8 rate:7;
1633 u8 sgi:1;
1634 u8 macid;
1635 u8 ldpc:1;
1636 u8 txbf:1;
1637 u8 noisy_state:1;
1638 u8 dummy2_0:5;
1639 u8 dummy3_0;
1640 u8 dummy4_0;
1641 u8 dummy5_0;
1642 u8 bw;
1702 u8 bt_status;
1725 u8 desc_rate;
1729 u8 rate_id;
1732 u8 rate_sgi;
1733 u8 rssi_sta_ra; /* Percentage */
1734 u8 pre_rssi_sta_ra;
1735 u8 sgi_enable;
1736 u8 decision_rate;
1737 u8 pre_rate;
1738 u8 highest_rate;
1739 u8 lowest_rate;
1747 u8 dynamic_tx_rpt_timing_counter;
1748 u8 ra_waiting_counter;
1749 u8 ra_pending_counter;
1750 u8 ra_drop_after_down;
1751 u8 pt_try_state; /* 0 trying state, 1 for decision state */
1752 u8 pt_stage; /* 0~6 */
1753 u8 pt_stop_count; /* Stop PT counter */
1754 u8 pt_pre_rate; /* if rate change do PT */
1755 u8 pt_pre_rssi; /* if RSSI change 5% do PT */
1756 u8 pt_mode_ss; /* decide which rate should do PT */
1757 u8 ra_stage; /* StageRA, decide how many times RA will be done between PT */
1758 u8 pt_smooth_factor;
1769 u8 crystal_cap;
1794 u8 mac_addr[ETH_ALEN];
1797 u8 cck_tx_power_index_A[RTL8XXXU_MAX_CHANNEL_GROUPS];
1798 u8 cck_tx_power_index_B[RTL8XXXU_MAX_CHANNEL_GROUPS];
1799 u8 ht40_1s_tx_power_index_A[RTL8XXXU_MAX_CHANNEL_GROUPS];
1800 u8 ht40_1s_tx_power_index_B[RTL8XXXU_MAX_CHANNEL_GROUPS];
1819 u8 package_type;
1840 u8 default_crystal_cap;
1841 u8 rfe_type;
1845 u8 out_ep[RTL8XXXU_OUT_ENDPOINTS];
1846 u8 ep_tx_count;
1847 u8 rf_paths;
1848 u8 rx_paths;
1849 u8 tx_paths;
1871 u8 val8;
1874 u8 raw[EFUSE_MAP_LEN];
1889 u8 pi_enabled:1;
1890 u8 no_pape:1;
1891 u8 int_buf[USB_INTR_CONTENT_LENGTH];
1892 u8 rssi_level;
1919 u8 macid;
1964 u32 ramask, u8 rateid, int sgi, int txbw_40mhz,
1965 u8 macid);
1967 u8 macid, u8 role, bool connect);
1968 void (*report_rssi) (struct rtl8xxxu_priv *priv, u8 macid, u8 rssi);
1973 u32 rts_rate, u8 macid);
1974 void (*set_crystal_cap) (struct rtl8xxxu_priv *priv, u8 crystal_cap);
1982 u8 has_s0s1:1;
1983 u8 has_tx_report:1;
1984 u8 gen2_thermal_meter:1;
1985 u8 needs_full_init:1;
1986 u8 init_reg_rxfltmap:1;
1987 u8 init_reg_pkt_life_time:1;
1988 u8 init_reg_hmtfr:1;
1989 u8 ampdu_max_time;
1990 u8 ustime_tsf_edca;
1992 u8 supports_ap:1;
1999 u8 pbp_rx;
2000 u8 pbp_tx;
2002 u8 total_page_num;
2003 u8 page_num_hi;
2004 u8 page_num_lo;
2005 u8 page_num_norm;
2006 u8 last_llt_entry;
2013 u8 rtl8xxxu_read8(struct rtl8xxxu_priv *priv, u16 addr);
2016 int rtl8xxxu_write8(struct rtl8xxxu_priv *priv, u16 addr, u8 val);
2019 int rtl8xxxu_write8_set(struct rtl8xxxu_priv *priv, u16 addr, u8 bits);
2020 int rtl8xxxu_write8_clear(struct rtl8xxxu_priv *priv, u16 addr, u8 bits);
2029 enum rtl8xxxu_rfpath path, u8 reg);
2031 enum rtl8xxxu_rfpath path, u8 reg, u32 data);
2033 enum rtl8xxxu_rfpath path, u8 reg,
2063 int rtl8xxxu_read_efuse8(struct rtl8xxxu_priv *priv, u16 offset, u8 *data);
2067 void rtl8xxxu_gen2_prepare_calibrate(struct rtl8xxxu_priv *priv, u8 start);
2088 u32 ramask, u8 rateid, int sgi, int txbw_40mhz, u8 macid);
2090 u32 ramask, u8 rateid, int sgi, int txbw_40mhz, u8 macid);
2092 u8 macid, u8 role, bool connect);
2094 u8 macid, u8 role, bool connect);
2095 void rtl8xxxu_gen1_report_rssi(struct rtl8xxxu_priv *priv, u8 macid, u8 rssi);
2096 void rtl8xxxu_gen2_report_rssi(struct rtl8xxxu_priv *priv, u8 macid, u8 rssi);
2123 u32 rts_rate, u8 macid);
2128 u32 rts_rate, u8 macid);
2133 u32 rts_rate, u8 macid);
2135 u8 arg1, u8 arg2, u8 arg3, u8 arg4, u8 arg5);
2137 void rtl8723a_set_crystal_cap(struct rtl8xxxu_priv *priv, u8 crystal_cap);
2138 void rtl8188f_set_crystal_cap(struct rtl8xxxu_priv *priv, u8 crystal_cap);
2141 u8 rate, u8 sgi, u8 bw);