Lines Matching refs:ret

207 	int ret;
215 	ret = wilc_cfg80211_init(&wilc, &spi->dev, WILC_HIF_SPI, &wilc_hif_spi);
216 	if (ret)
224 	ret = wilc_parse_gpios(wilc);
225 	if (ret < 0)
230 		ret = PTR_ERR(wilc->rtc_clk);
241 	return ret;
281 	int ret;
306 		ret = spi_sync(spi, &msg);
307 		if (ret < 0)
315 		ret = -EINVAL;
318 	return ret;
324 	int ret;
349 		ret = spi_sync(spi, &msg);
350 		if (ret < 0)
357 		ret = -EINVAL;
360 	return ret;
366 	int ret;
387 		ret = spi_sync(spi, &msg);
388 		if (ret < 0)
394 		ret = -EINVAL;
397 	return ret;
1112 	int ret, i;
1116 		ret = wilc_spi_read_reg(wilc, WILC_CHIPID, &chipid);
1117 		if (ret == 0)
1138 		ret = spi_internal_read(wilc, WILC_SPI_PROTOCOL_OFFSET, &reg);
1139 		if (ret == 0)
1143 	if (ret) {
1145 		return ret;
1163 	ret = spi_internal_write(wilc, WILC_SPI_PROTOCOL_OFFSET, reg);
1164 	if (ret) {
1168 		return ret;
1182 	ret = wilc_spi_read_reg(wilc, WILC_CHIPID, &chipid);
1183 	if (ret) {
1185 		return ret;
1195 	int ret;
1197 	ret = spi_internal_read(wilc,
1201 	return ret;
1212 	int ret;
1217 		ret = spi_internal_write(wilc,
1220 		if (ret)
1223 		ret = spi_internal_read(wilc,
1226 		if (ret || ((check & EN_VMM) == (val & EN_VMM)))
1231 	return ret;
1238 	int ret, i;
1248 	ret = wilc_spi_read_reg(wilc, WILC_PIN_MUX_0, &reg);
1249 	if (ret) {
1252 		return ret;
1255 	ret = wilc_spi_write_reg(wilc, WILC_PIN_MUX_0, reg);
1256 	if (ret) {
1259 		return ret;
1265 	ret = wilc_spi_read_reg(wilc, WILC_INTR_ENABLE, &reg);
1266 	if (ret) {
1269 		return ret;
1275 	ret = wilc_spi_write_reg(wilc, WILC_INTR_ENABLE, reg);
1276 	if (ret) {
1279 		return ret;
1282 		ret = wilc_spi_read_reg(wilc, WILC_INTR2_ENABLE, &reg);
1283 		if (ret) {
1286 			return ret;
1292 		ret = wilc_spi_write_reg(wilc, WILC_INTR2_ENABLE, reg);
1293 		if (ret) {
1296 			return ret;