Lines Matching refs:status
124 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
232 /* power management status cookie from firmware */
991 mwl8k_rxd_ap_process(void *_rxd, struct ieee80211_rx_status *status,
1000 memset(status, 0, sizeof(*status));
1002 status->signal = -rxd->rssi;
1006 status->encoding = RX_ENC_HT;
1008 status->bw = RATE_INFO_BW_40;
1009 status->rate_idx = MWL8K_AP_RATE_INFO_RATEID(rxd->rate);
1015 status->rate_idx = i;
1022 status->band = NL80211_BAND_5GHZ;
1023 if (!(status->encoding == RX_ENC_HT) &&
1024 status->rate_idx >= MWL8K_LEGACY_5G_RATE_OFFSET)
1025 status->rate_idx -= MWL8K_LEGACY_5G_RATE_OFFSET;
1027 status->band = NL80211_BAND_2GHZ;
1029 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1030 status->band);
1037 status->flag |= RX_FLAG_MMIC_ERROR;
1102 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
1114 memset(status, 0, sizeof(*status));
1116 status->signal = -rxd->rssi;
1118 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1119 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
1122 status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
1124 status->bw = RATE_INFO_BW_40;
1126 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1128 status->encoding = RX_ENC_HT;
1131 status->band = NL80211_BAND_5GHZ;
1132 if (!(status->encoding == RX_ENC_HT) &&
1133 status->rate_idx >= MWL8K_LEGACY_5G_RATE_OFFSET)
1134 status->rate_idx -= MWL8K_LEGACY_5G_RATE_OFFSET;
1136 status->band = NL80211_BAND_2GHZ;
1138 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1139 status->band);
1144 status->flag |= RX_FLAG_MMIC_ERROR;
1331 struct ieee80211_rx_status status;
1341 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1372 * this bss. If yes, set the status flags
1393 if (status.flag & RX_FLAG_MMIC_ERROR) {
1401 status.flag |= RX_FLAG_IV_STRIPPED |
1409 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1436 __le32 status;
1487 tx_desc->status = 0;
1518 u32 status;
1520 status = le32_to_cpu(tx_desc->status);
1521 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1636 #define MWL8K_TXD_SUCCESS(status) \
1637 ((status) & (MWL8K_TXD_STATUS_OK | \
1686 u32 status;
1695 status = le32_to_cpu(tx_desc->status);
1697 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1700 tx_desc->status &=
1754 info->status.rates[0].idx = -1;
1755 info->status.rates[0].count = 1;
1757 if (MWL8K_TXD_SUCCESS(status))
2114 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
3827 u32 status = 0;
3856 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3857 iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG),
4598 u32 status;
4600 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4601 if (!status)
4604 if (status & MWL8K_A2H_INT_TX_DONE) {
4605 status &= ~MWL8K_A2H_INT_TX_DONE;
4609 if (status & MWL8K_A2H_INT_RX_READY) {
4610 status &= ~MWL8K_A2H_INT_RX_READY;
4614 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4619 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4623 if (status)
4624 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4626 if (status & MWL8K_A2H_INT_OPC_DONE) {
4631 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {