Lines Matching refs:reg
323 .reg = &mwifiex_reg_sd87xx,
339 .reg = &mwifiex_reg_sd87xx,
355 .reg = &mwifiex_reg_sd87xx,
371 .reg = &mwifiex_reg_sd8897,
387 .reg = &mwifiex_reg_sd8977,
404 .reg = &mwifiex_reg_sd89xx,
422 .reg = &mwifiex_reg_sd8997,
439 .reg = &mwifiex_reg_sd8887,
455 .reg = &mwifiex_reg_sd89xx,
472 .reg = &mwifiex_reg_sd87xx,
564 card->reg = data->reg;
656 mwifiex_write_reg_locked(struct sdio_func *func, u32 reg, u8 data)
660 sdio_writeb(func, data, reg, &ret);
667 mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u8 data)
673 ret = mwifiex_write_reg_locked(card->func, reg, data);
682 mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u8 *data)
689 val = sdio_readb(card->func, reg, &ret);
762 const struct mwifiex_sdio_card_reg *reg = card->reg;
765 if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0))
768 if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1))
816 if (mwifiex_read_reg(adapter, card->reg->status_reg_0, &winner))
1034 u8 reg;
1040 if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, ®))
1042 if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg,
1043 reg | CMD53_NEW_MODE))
1047 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, ®))
1049 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0,
1050 reg | CMD_PORT_RD_LEN_EN))
1056 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, ®))
1058 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1,
1059 reg | CMD_PORT_AUTO_EN))
1074 u8 reg;
1086 if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, ®))
1087 adapter->ioport |= (reg & 0xff);
1091 if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, ®))
1092 adapter->ioport |= ((reg & 0xff) << 8);
1096 if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, ®))
1097 adapter->ioport |= ((reg & 0xff) << 16);
1105 if (mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, ®))
1107 if (mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg,
1108 reg | card->reg->sdio_int_mask))
1112 if (mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, ®))
1114 if (mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg,
1115 reg | AUTO_RE_ENABLE_INT))
1139 "write CFG reg failed\n");
1161 const struct mwifiex_sdio_card_reg *reg = card->reg;
1168 if (!(rd_bitmap & reg->data_port_mask))
1171 if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask)))
1193 card->curr_rd_port = reg->start_rd_port;
1212 const struct mwifiex_sdio_card_reg *reg = card->reg;
1227 card->curr_wr_port = reg->start_wr_port;
1259 if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs))
1285 mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0);
1300 card->reg->max_mp_regs,
1306 sdio_ireg = card->mp_regs[card->reg->host_int_status_reg];
1373 ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg,
1374 card->reg->host_int_enable);
1435 const struct mwifiex_sdio_card_reg *reg = card->reg;
1481 ret = mwifiex_read_reg(adapter, reg->base_0_reg,
1490 ret = mwifiex_read_reg(adapter, reg->base_1_reg,
1558 "write CFG reg failed\n");
1770 card->reg->data_port_mask)) ||
1975 const struct mwifiex_sdio_card_reg *reg = card->reg;
2004 rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8;
2005 rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0];
2039 bitmap = (u32) card->mp_regs[reg->wr_bitmap_l];
2040 bitmap |= ((u32) card->mp_regs[reg->wr_bitmap_u]) << 8;
2043 ((u32) card->mp_regs[reg->wr_bitmap_1l]) << 16;
2045 ((u32) card->mp_regs[reg->wr_bitmap_1u]) << 24;
2067 (u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK;
2075 bitmap = (u32) card->mp_regs[reg->rd_bitmap_l];
2076 bitmap |= ((u32) card->mp_regs[reg->rd_bitmap_u]) << 8;
2079 ((u32) card->mp_regs[reg->rd_bitmap_1l]) << 16;
2081 ((u32) card->mp_regs[reg->rd_bitmap_1u]) << 24;
2095 len_reg_l = reg->rd_len_p0_l + (port << 1);
2096 len_reg_u = reg->rd_len_p0_u + (port << 1);
2134 mwifiex_dbg(adapter, ERROR, "read CFG reg failed\n");
2137 "info: CFG reg val = %d\n", cr);
2141 "write CFG reg failed\n");
2147 "read CFG reg failed\n");
2150 "info: CFG reg val =%x\n", cr);
2501 mwifiex_read_reg(adapter, card->reg->host_strap_reg, &val);
2502 if ((val & card->reg->host_strap_mask) == card->reg->host_strap_value)
2533 const struct mwifiex_sdio_card_reg *reg = card->reg;
2544 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
2553 card->curr_rd_port = reg->start_rd_port;
2554 card->curr_wr_port = reg->start_wr_port;
2556 card->mp_data_port_mask = reg->data_port_mask;
2573 card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL);
2658 const struct mwifiex_sdio_card_reg *reg = card->reg;
2663 card->mp_data_port_mask = reg->data_port_mask;
2665 if (reg->start_wr_port) {
2671 card->curr_wr_port = reg->start_wr_port;
2719 sdio_writeb(card->func, card->reg->fw_dump_host_ready,
2720 card->reg->fw_dump_ctrl, &ret);
2726 ctrl_data = sdio_readb(card->func, card->reg->fw_dump_ctrl,
2736 if (ctrl_data != card->reg->fw_dump_host_ready) {
2738 "The ctrl reg was changed, re-try again\n");
2739 sdio_writeb(card->func, card->reg->fw_dump_host_ready,
2740 card->reg->fw_dump_ctrl, &ret);
2748 if (ctrl_data == card->reg->fw_dump_host_ready) {
2762 unsigned int reg, reg_start, reg_end;
2789 reg = card->reg->fw_dump_start;
2791 dump_num = sdio_readb(card->func, reg, &ret);
2806 reg = card->reg->fw_dump_start;
2808 read_reg = sdio_readb(card->func, reg, &ret);
2814 reg++;
2820 card->reg->fw_dump_ctrl,
2851 reg_start = card->reg->fw_dump_start;
2852 reg_end = card->reg->fw_dump_end;
2853 for (reg = reg_start; reg <= reg_end; reg++) {
2854 *dbg_ptr = sdio_readb(card->func, reg, &ret);
2885 unsigned int reg, reg_start, reg_end;
2909 reg_start = card->reg->fw_dump_start;
2910 reg_end = card->reg->fw_dump_end;
2911 for (reg = reg_start; reg <= reg_end; reg++) {
2913 start_flag = sdio_readb(card->func, reg, &ret);
2948 for (reg = reg_start; reg <= reg_end; reg++) {
2949 *dbg_ptr = sdio_readb(card->func, reg, &ret);
3057 u8 reg, reg_start, reg_end;
3083 reg_start = cardp->reg->func1_dump_reg_start;
3084 reg_end = cardp->reg->func1_dump_reg_end;
3089 reg_start = cardp->reg->func1_spec_reg_table[index++];
3090 size = cardp->reg->func1_spec_reg_num;
3091 reg_end = cardp->reg->func1_spec_reg_table[size-1];
3098 reg_start = cardp->reg->func1_scratch_reg;
3108 for (reg = reg_start; reg <= reg_end;) {
3110 data = sdio_f0_readb(cardp->func, reg, &ret);
3112 data = sdio_readb(cardp->func, reg, &ret);
3115 ptr += sprintf(ptr, "(%#x) ", reg);
3123 if (count == 2 && reg < reg_end)
3124 reg = cardp->reg->func1_spec_reg_table[index++];
3126 reg++;
3162 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);