Lines Matching refs:port
703 u8 *buffer, u32 pkt_len, u32 port)
708 (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE : BLOCK_MODE;
714 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
734 u32 len, u32 port, u8 claim)
738 u8 blk_mode = (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE
743 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
1046 /* Configure cmd port and enable reading rx length from the register */
1053 /* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is
1085 /* Read the IO port */
1102 "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport);
1125 u8 *payload, u32 pkt_len, u32 port)
1131 ret = mwifiex_write_data_sync(adapter, payload, pkt_len, port);
1151 * This function gets the read port.
1153 * If control port bit is set in MP read bitmap, the control port
1154 * is returned, otherwise the current read port is returned and
1158 static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port)
1178 *port = CTRL_PORT;
1180 "data: port=%d mp_rd_bitmap=0x%08x\n",
1181 *port, card->mp_rd_bitmap);
1190 *port = card->curr_rd_port;
1196 "data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n",
1197 *port, rd_bitmap, card->mp_rd_bitmap);
1203 * This function gets the write port for data.
1205 * The current write port is returned if available and the value is
1209 static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port)
1225 *port = card->curr_wr_port;
1233 if ((card->has_control_mask) && (*port == CTRL_PORT)) {
1235 "invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
1236 *port, card->curr_wr_port, wr_bitmap,
1242 "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
1243 *port, wr_bitmap, card->mp_wr_bitmap);
1310 * For SDIO new mode CMD port interrupts
1732 * For data received on control port, or if aggregation is disabled, the
1738 u16 rx_len, u8 port)
1750 if ((card->has_control_mask) && (port == CTRL_PORT)) {
1811 mp_rx_aggr_setup(card, rx_len, port);
1906 mwifiex_dbg(adapter, INFO, "info: RX: port: %d, rx_len: %d\n",
1907 port, rx_len);
1913 "drop pkt port=%d len=%d\n", port, rx_len);
1916 adapter->ioport + port))
1925 adapter->ioport + port))
1942 mp_rx_aggr_setup(card, rx_len, port);
1966 * port updated is command port only, command sent interrupt checking
1979 u8 port = CTRL_PORT;
2032 "%s:Received wrong packet on cmd port",
2060 /* As firmware will not generate download ready interrupt if the port
2061 updated is command port only, cmd_sent should be done for any SDIO
2064 /* Check if firmware has attach buffer at command port and
2089 ret = mwifiex_get_rd_port(adapter, &port);
2095 len_reg_l = reg->rd_len_p0_l + (port << 1);
2096 len_reg_u = reg->rd_len_p0_u + (port << 1);
2100 "info: RX: port=%d rx_len=%u\n",
2101 port, rx_len);
2120 port)) {
2170 u8 *payload, u32 pkt_len, u32 port,
2183 (card->has_control_mask && (port == CTRL_PORT)) ||
2184 (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) {
2249 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
2288 /* Save the last multi port tx aggregation info to debug log. */
2304 __func__, port);
2306 adapter->ioport + port);
2313 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
2337 u32 port = CTRL_PORT;
2355 ret = mwifiex_get_wr_port_data(adapter, &port);
2373 port = CMD_PORT_SLCT;
2381 port, tx_param->next_pkt_len
2385 port, 0);
2393 card->curr_wr_port = port;
2525 * - Get SDIO port
2601 /* Disable rx single port aggregation */
2608 /* Disable multi port aggregation */
2652 * This function updates the MP end port in card.
2655 mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port)
2661 card->mp_end_port = port;
2674 "cmd: mp_end_port %d, data port mask 0x%x\n",
2675 port, card->mp_data_port_mask);
3165 dev_err(&card->func->dev, "error enabling SDIO port\n");