Lines Matching defs:val
330 static inline void read_register(struct net_device *dev, u32 reg, u32 * val)
334 *val = ioread32(priv->ioaddr + reg);
335 IPW_DEBUG_IO("r: 0x%08X => 0x%08X\n", reg, *val);
338 static inline void write_register(struct net_device *dev, u32 reg, u32 val)
342 iowrite32(val, priv->ioaddr + reg);
343 IPW_DEBUG_IO("w: 0x%08X <= 0x%08X\n", reg, val);
347 u16 * val)
351 *val = ioread16(priv->ioaddr + reg);
352 IPW_DEBUG_IO("r: 0x%08X => %04X\n", reg, *val);
355 static inline void read_register_byte(struct net_device *dev, u32 reg, u8 * val)
359 *val = ioread8(priv->ioaddr + reg);
360 IPW_DEBUG_IO("r: 0x%08X => %02X\n", reg, *val);
363 static inline void write_register_word(struct net_device *dev, u32 reg, u16 val)
367 iowrite16(val, priv->ioaddr + reg);
368 IPW_DEBUG_IO("w: 0x%08X <= %04X\n", reg, val);
371 static inline void write_register_byte(struct net_device *dev, u32 reg, u8 val)
375 iowrite8(val, priv->ioaddr + reg);
376 IPW_DEBUG_IO("w: 0x%08X =< %02X\n", reg, val);
379 static inline void read_nic_dword(struct net_device *dev, u32 addr, u32 * val)
383 read_register(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
386 static inline void write_nic_dword(struct net_device *dev, u32 addr, u32 val)
390 write_register(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
393 static inline void read_nic_word(struct net_device *dev, u32 addr, u16 * val)
397 read_register_word(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
400 static inline void write_nic_word(struct net_device *dev, u32 addr, u16 val)
404 write_register_word(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
407 static inline void read_nic_byte(struct net_device *dev, u32 addr, u8 * val)
411 read_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
414 static inline void write_nic_byte(struct net_device *dev, u32 addr, u8 val)
418 write_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
506 void *val, u32 * len)
534 read_nic_dword(priv->net_dev, addr, val);
573 read_nic_memory(priv->net_dev, addr, total_length, val);
584 static int ipw2100_set_ordinal(struct ipw2100_priv *priv, u32 ord, u32 * val,
600 write_nic_dword(priv->net_dev, addr, *val);
1175 u32 val;
1193 read_nic_dword(priv->net_dev, addr + 0xFC, &val);
1194 priv->eeprom_version = (val >> 24) & 0xFF;
1204 read_nic_dword(priv->net_dev, addr + 0x20, &val);
1205 if (!((val >> 24) & 0x01))
3499 u32 val;
3504 pci_read_config_dword(pci_dev, i * 16 + j, &val);
3505 out += sprintf(out, "%08X ", val);
3784 u32 val = 0;
3789 read_register(dev, hw_data[i].addr, &val);
3791 hw_data[i].name, hw_data[i].addr, val);
3938 u32 val = 0;
3953 if (ipw2100_get_ordinal(priv, ord_data[loop].index, &val,
3960 ord_data[loop].index, val,
4143 u32 val;
4146 ret = kstrtou32(buf, 0, &val);
4150 ipw2100_debug_level = val;
4205 unsigned long val;
4212 ret = kstrtoul(buf, 0, &val);
4216 priv->ieee->scan_age = val;
4234 int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) |
4236 return sprintf(buf, "%i\n", val);
6143 u32 val;
6201 pci_read_config_dword(pci_dev, 0x40, &val);
6202 if ((val & 0x0000ff00) != 0)
6203 pci_write_config_dword(pci_dev, 0x40, val & 0xffff00ff);
6412 u32 val;
6427 pci_read_config_dword(pci_dev, 0x40, &val);
6428 if ((val & 0x0000ff00) != 0)
6429 pci_write_config_dword(pci_dev, 0x40, val & 0xffff00ff);
6743 u16 val;
6831 val = 0;
6835 range->freq[val].i = i + 1;
6836 range->freq[val].m = ipw2100_frequencies[i] * 100000;
6837 range->freq[val].e = 1;
6838 val++;
6840 if (val == IW_MAX_FREQUENCIES)
6843 range->num_frequency = val;
7080 int val;
7081 unsigned int len = sizeof(val);
7097 err = ipw2100_get_ordinal(priv, IPW_ORD_CURRENT_TX_RATE, &val, &len);
7103 switch (val & TX_RATE_MASK) {