Lines Matching defs:offset
222 /* GPIO register offset, in both ChipCommon and PCI core. */
242 #define B43_SHM_SH_RXPADOFF 0x0034 /* RX Padding data offset (PIO only) */
296 #define B43_SHM_SH_BTSFOFF 0x001C /* Beacon TSF offset */
1026 static inline u16 b43_read16(struct b43_wldev *dev, u16 offset)
1028 return dev->dev->read16(dev->dev, offset);
1031 static inline void b43_write16(struct b43_wldev *dev, u16 offset, u16 value)
1033 dev->dev->write16(dev->dev, offset, value);
1037 static inline void b43_write16f(struct b43_wldev *dev, u16 offset, u16 value)
1039 b43_write16(dev, offset, value);
1042 b43_read16(dev, offset);
1046 static inline void b43_maskset16(struct b43_wldev *dev, u16 offset, u16 mask,
1049 b43_write16(dev, offset, (b43_read16(dev, offset) & mask) | set);
1052 static inline u32 b43_read32(struct b43_wldev *dev, u16 offset)
1054 return dev->dev->read32(dev->dev, offset);
1057 static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value)
1059 dev->dev->write32(dev->dev, offset, value);
1062 static inline void b43_maskset32(struct b43_wldev *dev, u16 offset, u32 mask,
1065 b43_write32(dev, offset, (b43_read32(dev, offset) & mask) | set);
1069 size_t count, u16 offset, u8 reg_width)
1071 dev->dev->block_read(dev->dev, buffer, count, offset, reg_width);
1075 size_t count, u16 offset, u8 reg_width)
1077 dev->dev->block_write(dev->dev, buffer, count, offset, reg_width);