Lines Matching refs:config
398 ah->config.dma_beacon_response_time = 1;
399 ah->config.sw_beacon_response_time = 6;
400 ah->config.cwm_ignore_extcca = false;
401 ah->config.analog_shiftreg = 1;
403 ah->config.rx_intr_mitigation = true;
406 ah->config.rimt_last = 500;
407 ah->config.rimt_first = 2000;
409 ah->config.rimt_last = 250;
410 ah->config.rimt_first = 700;
414 ah->config.pll_pwrsave = 7;
433 ah->config.serialize_regmode = SER_REG_MODE_AUTO;
435 if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_AUTO) {
439 ah->config.serialize_regmode = SER_REG_MODE_ON;
441 ah->config.serialize_regmode = SER_REG_MODE_OFF;
446 ah->config.serialize_regmode);
449 ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD >> 1;
451 ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD;
948 if (ah->config.rx_intr_mitigation) {
956 if (ah->config.rx_intr_mitigation) {
965 if (ah->config.tx_intr_mitigation) {
2023 if (ah->config.rx_intr_mitigation) {
2024 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, ah->config.rimt_last);
2025 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, ah->config.rimt_first);
2028 if (ah->config.tx_intr_mitigation) {
2071 if (ah->config.hw_hang_checks & HW_PHYRESTART_CLC_WAR)
2299 TU_TO_USEC(ah->config.dma_beacon_response_time));
2301 TU_TO_USEC(ah->config.sw_beacon_response_time));
3069 if (IS_CHAN_HT40(chan) && !ah->config.cwm_ignore_extcca)