Lines Matching refs:addr
233 .addr = 0x00000018,
254 .addr = 0x00000030,
265 .addr = 0x00000038,
281 .addr = 0x0000004c,
300 .addr = 0x00000050,
365 .addr = 0x00000010,
408 .addr = 0x00000030,
419 .addr = 0x00000038,
435 .addr = 0x0000004c,
454 .addr = 0x00000050,
744 u32 addr, reg_val, mem_val;
760 addr = (RTC_SOC_BASE_ADDRESS | EFUSE_OFFSET);
761 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
772 addr = (RTC_SOC_BASE_ADDRESS | BB_PLL_CONFIG_OFFSET);
773 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
780 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
785 addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_SETTLE_OFFSET);
786 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
792 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
797 addr = (RTC_SOC_BASE_ADDRESS | SOC_CORE_CLK_CTRL_OFFSET);
798 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
804 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
816 addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_CONTROL_OFFSET);
817 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
824 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
830 addr = (RTC_WMAC_BASE_ADDRESS | RTC_SYNC_STATUS_OFFSET);
832 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
848 addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_CONTROL_OFFSET);
849 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
855 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
861 addr = (RTC_WMAC_BASE_ADDRESS | RTC_SYNC_STATUS_OFFSET);
863 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
879 addr = (RTC_SOC_BASE_ADDRESS | SOC_CPU_CLOCK_OFFSET);
880 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
886 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
891 addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_CONTROL_OFFSET);
892 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
897 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
940 u32 addr = address & REGION_ACCESS_SIZE_MASK;
946 if (addr + length > REGION_ACCESS_SIZE_LIMIT) {
947 size = REGION_ACCESS_SIZE_LIMIT - addr;
1048 base_addr = __le32_to_cpu(metadata->addr);