Lines Matching defs:phy
4220 static bool rtl8152_is_fw_phy_speed_up_ok(struct r8152 *tp, struct fw_phy_speed_up *phy)
4247 fw_offset = __le16_to_cpu(phy->fw_offset);
4248 length = __le32_to_cpu(phy->blk_hdr.length);
4249 if (fw_offset < sizeof(*phy) || length <= fw_offset) {
4260 if (__le16_to_cpu(phy->fw_reg) != 0x9A00) {
4291 dev_err(&tp->intf->dev, "invalid phy ver addr\n");
4322 dev_err(&tp->intf->dev, "invalid phy fixup\n");
4331 static bool rtl8152_is_fw_phy_union_ok(struct r8152 *tp, struct fw_phy_union *phy)
4348 fw_offset = __le16_to_cpu(phy->fw_offset);
4349 length = __le32_to_cpu(phy->blk_hdr.length);
4350 if (fw_offset < sizeof(*phy) || length <= fw_offset) {
4361 if (phy->pre_num > 2) {
4362 dev_err(&tp->intf->dev, "invalid pre_num %d\n", phy->pre_num);
4366 if (phy->bp_num > 8) {
4367 dev_err(&tp->intf->dev, "invalid bp_num %d\n", phy->bp_num);
4376 static bool rtl8152_is_fw_phy_nc_ok(struct r8152 *tp, struct fw_phy_nc *phy)
4396 fw_offset = __le16_to_cpu(phy->fw_offset);
4397 if (fw_offset < sizeof(*phy)) {
4402 length = __le32_to_cpu(phy->blk_hdr.length);
4408 length -= __le16_to_cpu(phy->fw_offset);
4414 if (__le16_to_cpu(phy->fw_reg) != fw_reg) {
4419 if (__le16_to_cpu(phy->ba_reg) != ba_reg) {
4424 if (__le16_to_cpu(phy->patch_en_addr) != patch_en_addr) {
4430 if (__le16_to_cpu(phy->mode_reg) != mode_reg) {
4436 if (__le16_to_cpu(phy->bp_start) != bp_start) {
4442 if (__le16_to_cpu(phy->bp_num) > 4) {
4923 static void rtl_ram_code_speed_up(struct r8152 *tp, struct fw_phy_speed_up *phy, bool wait)
4930 if (sram_read(tp, SRAM_GPHY_FW_VER) >= __le16_to_cpu(phy->version)) {
4935 len = __le32_to_cpu(phy->blk_hdr.length);
4936 len -= __le16_to_cpu(phy->fw_offset);
4937 data = (u8 *)phy + __le16_to_cpu(phy->fw_offset);
4955 generic_ocp_write(tp, __le16_to_cpu(phy->fw_reg), 0xff, size, data, MCU_TYPE_USB);
4979 if (sram_read(tp, SRAM_GPHY_FW_VER) == __le16_to_cpu(phy->version))
4980 dev_dbg(&tp->intf->dev, "successfully applied %s\n", phy->info);
5037 static void rtl8152_fw_phy_union_apply(struct r8152 *tp, struct fw_phy_union *phy)
5045 num = phy->pre_num;
5047 sram_write(tp, __le16_to_cpu(phy->pre_set[i].addr),
5048 __le16_to_cpu(phy->pre_set[i].data));
5050 length = __le32_to_cpu(phy->blk_hdr.length);
5051 length -= __le16_to_cpu(phy->fw_offset);
5053 data = (__le16 *)((u8 *)phy + __le16_to_cpu(phy->fw_offset));
5055 ocp_reg_write(tp, OCP_SRAM_ADDR, __le16_to_cpu(phy->fw_reg));
5059 num = phy->bp_num;
5061 sram_write(tp, __le16_to_cpu(phy->bp[i].addr), __le16_to_cpu(phy->bp[i].data));
5063 if (phy->bp_num && phy->bp_en.addr)
5064 sram_write(tp, __le16_to_cpu(phy->bp_en.addr), __le16_to_cpu(phy->bp_en.data));
5066 dev_dbg(&tp->intf->dev, "successfully applied %s\n", phy->info);
5069 static void rtl8152_fw_phy_nc_apply(struct r8152 *tp, struct fw_phy_nc *phy)
5077 mode_reg = __le16_to_cpu(phy->mode_reg);
5078 sram_write(tp, mode_reg, __le16_to_cpu(phy->mode_pre));
5079 sram_write(tp, __le16_to_cpu(phy->ba_reg),
5080 __le16_to_cpu(phy->ba_data));
5082 length = __le32_to_cpu(phy->blk_hdr.length);
5083 length -= __le16_to_cpu(phy->fw_offset);
5085 data = (__le16 *)((u8 *)phy + __le16_to_cpu(phy->fw_offset));
5087 ocp_reg_write(tp, OCP_SRAM_ADDR, __le16_to_cpu(phy->fw_reg));
5091 sram_write(tp, __le16_to_cpu(phy->patch_en_addr),
5092 __le16_to_cpu(phy->patch_en_value));
5094 bp_index = __le16_to_cpu(phy->bp_start);
5095 num = __le16_to_cpu(phy->bp_num);
5097 sram_write(tp, bp_index, __le16_to_cpu(phy->bp[i]));
5101 sram_write(tp, mode_reg, __le16_to_cpu(phy->mode_post));
5103 dev_dbg(&tp->intf->dev, "successfully applied %s\n", phy->info);
6732 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */