Lines Matching defs:phydev
163 struct phy_device *phydev = dev_get_drvdata(dev);
166 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_TEMP_STA);
200 static int gpy_hwmon_register(struct phy_device *phydev)
202 struct device *dev = &phydev->mdio.dev;
211 phydev,
218 static int gpy_hwmon_register(struct phy_device *phydev)
224 static int gpy_mbox_read(struct phy_device *phydev, u32 addr)
226 struct gpy_priv *priv = phydev->priv;
232 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_ADDRLO,
240 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_CMD, cmd);
249 ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
256 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_DATA);
263 static int gpy_config_init(struct phy_device *phydev)
268 ret = phy_write(phydev, PHY_IMASK, 0);
273 ret = phy_read(phydev, PHY_ISTAT);
277 static int gpy_probe(struct phy_device *phydev)
279 struct device *dev = &phydev->mdio.dev;
284 if (!phydev->is_c45) {
285 ret = phy_get_c45_ids(phydev);
293 phydev->priv = priv;
297 phydev->dev_flags |= PHY_F_NO_IRQ;
299 fw_version = phy_read(phydev, PHY_FWV);
305 ret = gpy_hwmon_register(phydev);
310 phydev_info(phydev, "Firmware Version: %d.%d (0x%04X%s)\n",
317 static bool gpy_sgmii_need_reaneg(struct phy_device *phydev)
319 struct gpy_priv *priv = phydev->priv;
333 static bool gpy_2500basex_chk(struct phy_device *phydev)
337 ret = phy_read(phydev, PHY_MIISTAT);
339 phydev_err(phydev, "Error: MDIO register access failed: %d\n",
348 phydev->speed = SPEED_2500;
349 phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
350 phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
355 static bool gpy_sgmii_aneg_en(struct phy_device *phydev)
359 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL);
361 phydev_err(phydev, "Error: MMD register access failed: %d\n",
369 static int gpy_config_mdix(struct phy_device *phydev, u8 ctrl)
388 ret = phy_modify(phydev, PHY_CTL1, PHY_CTL1_AMDIX | PHY_CTL1_MDIAB |
393 return genphy_c45_restart_aneg(phydev);
396 static int gpy_config_aneg(struct phy_device *phydev)
402 if (phydev->autoneg == AUTONEG_DISABLE) {
406 return phydev->duplex != DUPLEX_FULL
407 ? genphy_setup_forced(phydev)
408 : genphy_c45_pma_setup_forced(phydev);
411 ret = gpy_config_mdix(phydev, phydev->mdix_ctrl);
415 ret = genphy_c45_an_config_aneg(phydev);
421 adv = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
422 ret = phy_modify_changed(phydev, MII_CTRL1000,
430 ret = genphy_c45_check_and_restart_aneg(phydev, changed);
434 if (phydev->interface == PHY_INTERFACE_MODE_USXGMII ||
435 phydev->interface == PHY_INTERFACE_MODE_INTERNAL)
441 if (!gpy_sgmii_need_reaneg(phydev) || gpy_2500basex_chk(phydev) ||
442 !gpy_sgmii_aneg_en(phydev))
466 if (phydev->state != PHY_UP)
469 ret = phy_read_poll_timeout(phydev, MII_BMSR, ret, ret & BMSR_LSTATUS,
477 return phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
481 static int gpy_update_mdix(struct phy_device *phydev)
485 ret = phy_read(phydev, PHY_CTL1);
490 phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
493 phydev->mdix_ctrl = ETH_TP_MDI_X;
495 phydev->mdix_ctrl = ETH_TP_MDI;
497 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PHY_PMA_MGBT_POLARITY);
502 phydev->mdix = ETH_TP_MDI_X;
504 phydev->mdix = ETH_TP_MDI;
509 static int gpy_update_interface(struct phy_device *phydev)
514 if (phydev->interface == PHY_INTERFACE_MODE_USXGMII ||
515 phydev->interface == PHY_INTERFACE_MODE_INTERNAL)
521 switch (phydev->speed) {
523 phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
524 ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
527 phydev_err(phydev,
536 phydev->interface = PHY_INTERFACE_MODE_SGMII;
537 if (gpy_sgmii_aneg_en(phydev))
542 ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
546 phydev_err(phydev,
554 if (phydev->speed == SPEED_2500 || phydev->speed == SPEED_1000) {
555 ret = genphy_read_master_slave(phydev);
560 return gpy_update_mdix(phydev);
563 static int gpy_read_status(struct phy_device *phydev)
567 ret = genphy_update_link(phydev);
571 phydev->speed = SPEED_UNKNOWN;
572 phydev->duplex = DUPLEX_UNKNOWN;
573 phydev->pause = 0;
574 phydev->asym_pause = 0;
576 if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
577 ret = genphy_c45_read_lpa(phydev);
582 ret = phy_read(phydev, MII_STAT1000);
585 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, ret);
586 } else if (phydev->autoneg == AUTONEG_DISABLE) {
587 linkmode_zero(phydev->lp_advertising);
590 ret = phy_read(phydev, PHY_MIISTAT);
594 phydev->link = (ret & PHY_MIISTAT_LS) ? 1 : 0;
595 phydev->duplex = (ret & PHY_MIISTAT_DPX) ? DUPLEX_FULL : DUPLEX_HALF;
598 phydev->speed = SPEED_10;
601 phydev->speed = SPEED_100;
604 phydev->speed = SPEED_1000;
607 phydev->speed = SPEED_2500;
611 if (phydev->link) {
612 ret = gpy_update_interface(phydev);
620 static int gpy_config_intr(struct phy_device *phydev)
624 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
627 return phy_write(phydev, PHY_IMASK, mask);
630 static irqreturn_t gpy_handle_interrupt(struct phy_device *phydev)
634 reg = phy_read(phydev, PHY_ISTAT);
636 phy_error(phydev);
657 reg = gpy_mbox_read(phydev, REG_GPIO0_OUT);
659 phy_error(phydev);
664 phy_trigger_machine(phydev);
669 static int gpy_set_wol(struct phy_device *phydev,
672 struct net_device *attach_dev = phydev->attached_dev;
681 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,
688 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,
695 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,
703 ret = phy_write(phydev, PHY_IMASK, PHY_IMASK_WOL);
708 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,
717 ret = phy_read(phydev, PHY_ISTAT);
722 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2,
731 ret = phy_set_bits(phydev, PHY_IMASK, PHY_IMASK_LSTC);
736 ret = phy_read(phydev, PHY_ISTAT);
741 phy_trigger_machine(phydev);
747 return phy_clear_bits(phydev, PHY_IMASK, PHY_IMASK_LSTC);
750 static void gpy_get_wol(struct phy_device *phydev,
758 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, VPSPEC2_WOL_CTL);
762 ret = phy_read(phydev, PHY_IMASK);
767 static int gpy_loopback(struct phy_device *phydev, bool enable)
769 struct gpy_priv *priv = phydev->priv;
783 ret = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, set);
799 static int gpy115_loopback(struct phy_device *phydev, bool enable)
801 struct gpy_priv *priv = phydev->priv;
804 return gpy_loopback(phydev, enable);
807 return gpy_loopback(phydev, 0);
809 return genphy_soft_reset(phydev);