Lines Matching defs:tmp
2387 struct lan8814_ptp_rx_ts *rx_ts, *tmp;
2464 list_for_each_entry_safe(rx_ts, tmp, &ptp_priv->rx_ts_list, list) {
2517 struct lan8814_ptp_rx_ts *rx_ts, *tmp;
2526 list_for_each_entry_safe(rx_ts, tmp, &ptp_priv->rx_ts_list, list) {
3526 int pin, ret, tmp;
3533 tmp = phy_read_mmd(phydev, 2, LAN8841_PTP_GPIO_CAP_STS);
3534 if (tmp < 0)
3543 if (tmp & BIT(pin)) {
4180 u16 tmp;
4188 tmp = LAN8841_GPIO_DATA_SEL_GPIO_DATA_SEL_EVENT_MASK << (3 * pin);
4189 ret = phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_DATA_SEL1, tmp);
4191 tmp = LAN8841_GPIO_DATA_SEL_GPIO_DATA_SEL_EVENT_MASK << (3 * (pin - 5));
4192 ret = phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_DATA_SEL2, tmp);
4199 tmp = LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_POL_A |
4202 tmp = LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_POL_B |
4204 return phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_EN, tmp);
4211 u16 tmp;
4235 tmp = LAN8841_GPIO_DATA_SEL_GPIO_DATA_SEL_EVENT_A;
4237 tmp = LAN8841_GPIO_DATA_SEL_GPIO_DATA_SEL_EVENT_B;
4241 tmp << (3 * pin));
4244 tmp << (3 * (pin - 5)));
4394 u16 tmp = 0;
4408 tmp |= LAN8841_PTP_GPIO_CAP_EN_GPIO_RE_CAPTURE_ENABLE(pin);
4410 tmp |= LAN8841_PTP_GPIO_CAP_EN_GPIO_FE_CAPTURE_ENABLE(pin);
4411 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_CAP_EN, tmp);